Hardware-Efficient Hamiltonian Simulation via Trotter-Initialized Variational Optimization with Native Placement
Abstract
Compiling time-evolution operators of the form into hardware-native gate sequences is a central bottleneck for digital quantum simulation on noisy intermediate-scale quantum (NISQ) devices. Generic transpilation treats as an arbitrary unitary, discarding the structure of Hamiltonian dynamics and producing circuits whose depth exceeds hardware coherence limits. We introduce a structure-aware compilation framework that treats product-formula decompositions as synthesis primitives rather than simulation approximations. The method combines (i) native placement of Hamiltonian terms onto the hardware coupling map, (ii) adaptive selection of Trotter blocks via a greedy discretization procedure, and (iii) variational refinement using a Trotter-initialized ansatz. Across Heisenberg, Ising, and XY models with -- qubits, the compiled circuits achieve fidelities with approximately linear scaling in the number of entangling gates, while generic synthesis produces circuits that are orders of magnitude deeper. On IBM Torino hardware, we observe a regime in which shorter approximate circuits outperform deeper exact decompositions: a 27-CX circuit achieves higher hardware fidelity () than a 187-CX exact circuit. These results demonstrate that, in the NISQ regime, structure-aware approximate compilation can outperform exact structure-agnostic synthesis, providing a practical pathway for executing Hamiltonian dynamics without requiring pulse-level control.
Keywords
Cite
@article{arxiv.2604.26663,
title = {Hardware-Efficient Hamiltonian Simulation via Trotter-Initialized Variational Optimization with Native Placement},
author = {F. S. Luiz and P. N. Ferreira and M. C. de Oliveira},
journal= {arXiv preprint arXiv:2604.26663},
year = {2026}
}
Comments
20 pages, 11 figures