The emergence of resistive non-volatile memories opens the way to highly energy-efficient computation near- or in-memory. However, this type of computation is not compatible with conventional ECC, and has to deal with device unreliability. Inspired by the architecture of animal brains, we present a manufactured differential hybrid CMOS/RRAM memory architecture suitable for neural network implementation that functions without formal ECC. We also show that using low-energy but error-prone programming conditions only slightly reduces network accuracy.
@article{arxiv.2007.06238,
title = {Embracing the Unreliability of Memory Devices for Neuromorphic Computing},
author = {Marc Bocquet and Tifenn Hirtzlin and Jacques-Olivier Klein and Etienne Nowak and Elisa Vianello and Jean-Michel Portal and Damien Querlioz},
journal= {arXiv preprint arXiv:2007.06238},
year = {2020}
}