English

Deterministic Timed Finite State Machines: Equivalence Checking and Expressive Power

Formal Languages and Automata Theory 2014-08-27 v1

Abstract

There has been a growing interest in defining models of automata enriched with time. For instance, timed automata were introduced as automata extended with clocks. In this paper, we study models of timed finite state machines (TFSMs), i.e., FSMs enriched with time, which accept timed input words and generate timed output words. Here we discuss some models of TFSMs with a single clock: TFSMs with timed guards, TFSMs with timeouts, and TFSMs with both timed guards and timeouts. We solve the problem of equivalence checking for all three models, and we compare their expressive power, characterizing subclasses of TFSMs with timed guards and of TFSMs with timeouts that are equivalent to each other.

Keywords

Cite

@article{arxiv.1408.5967,
  title  = {Deterministic Timed Finite State Machines: Equivalence Checking and Expressive Power},
  author = {Davide Bresolin and Khaled El-Fakih and Tiziano Villa and Nina Yevtushenko},
  journal= {arXiv preprint arXiv:1408.5967},
  year   = {2014}
}

Comments

In Proceedings GandALF 2014, arXiv:1408.5560

R2 v1 2026-06-22T05:39:33.040Z