English

CMOS-Memristor Dendrite Threshold Circuits

Emerging Technologies 2016-09-19 v1

Abstract

Non-linear neuron models overcomes the limitations of linear binary models of neurons that have the inability to compute linearly non-separable functions such as XOR. While several biologically plausible models based on dendrite thresholds are reported in the previous studies, the hardware implementation of such non-linear neuron models remain as an open problem. In this paper, we propose a circuit design for implementing logical dendrite non-linearity response of dendrite spike and saturation types. The proposed dendrite cells are used to build XOR circuit and intensity detection circuit that consists of different combinations of dendrite cells with saturating and spiking responses. The dendrite cells are designed using a set of memristors, Zener diodes, and CMOS NOT gates. The circuits are designed, analyzed and verified on circuit boards.

Keywords

Cite

@article{arxiv.1609.04921,
  title  = {CMOS-Memristor Dendrite Threshold Circuits},
  author = {Askhat Zhanbossinov and Kamilya Smagulova and Alex Pappachen James},
  journal= {arXiv preprint arXiv:1609.04921},
  year   = {2016}
}

Comments

Zhanbossinov, K. Smagulova, A. P. James, CMOS-Memristor Dendrite Threshold Circuits, 2016 IEEE APCCAS, Jeju, Korea, October 25-28, 2016

R2 v1 2026-06-22T15:51:33.313Z