English

Challenges and Research Directions for Large Language Model Inference Hardware

Hardware Architecture 2026-02-10 v3 Artificial Intelligence Machine Learning

Abstract

Large Language Model (LLM) inference is hard. The autoregressive Decode phase of the underlying Transformer model makes LLM inference fundamentally different from training. Exacerbated by recent AI trends, the primary challenges are memory and interconnect rather than compute. To address these challenges, we highlight four architecture research opportunities: High Bandwidth Flash for 10X memory capacity with HBM-like bandwidth; Processing-Near-Memory and 3D memory-logic stacking for high memory bandwidth; and low-latency interconnect to speedup communication. While our focus is datacenter AI, we also review their applicability for mobile devices.

Keywords

Cite

@article{arxiv.2601.05047,
  title  = {Challenges and Research Directions for Large Language Model Inference Hardware},
  author = {Xiaoyu Ma and David Patterson},
  journal= {arXiv preprint arXiv:2601.05047},
  year   = {2026}
}

Comments

Accepted for publication by IEEE Computer, 2026

R2 v1 2026-07-01T08:56:20.996Z