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ALADIN: Accuracy-Latency-Aware Design-space Inference Analysis for Embedded AI Accelerators

Hardware Architecture 2026-03-11 v1 Artificial Intelligence Machine Learning

Abstract

The inference of deep neural networks (DNNs) on resource-constrained embedded systems introduces non-trivial trade-offs among model accuracy, computational latency, and hardware limitations, particularly when real-time constraints must be satisfied. This paper presents ALADIN, an accuracy-latency-aware design-space inference analysis framework for mixed-precision quantized neural networks (QNNs) targeting scratchpad-based AI accelerators. ALADIN enables the evaluation and analysis of inference bottlenecks and design trade-offs across accuracy, latency, and resource consumption without requiring deployment on the target platform, thereby significantly reducing development time and cost. The framework introduces a progressive refinement process that transforms a canonical QONNX model into platform-aware representations by integrating both platform-independent implementation details and hardware-specific characteristics. ALADIN is validated using a cycle-accurate simulator of a RISC-V based platform specialized for AI workloads, demonstrating its effectiveness as a tool for quantitative inference analysis and hardware-software co-design. Experimental results highlight how architectural decisions and mixed-precision quantization strategies impact accuracy, latency, and resource usage, and show that these effects can be precisely evaluated and compared using ALADIN, while also revealing subtle optimization tensions.

Keywords

Cite

@article{arxiv.2603.08722,
  title  = {ALADIN: Accuracy-Latency-Aware Design-space Inference Analysis for Embedded AI Accelerators},
  author = {T. Baldi and D. Casini and A. Biondi},
  journal= {arXiv preprint arXiv:2603.08722},
  year   = {2026}
}

Comments

Under review

R2 v1 2026-07-01T11:10:51.329Z