A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms
Abstract
Recent trends in deep learning (DL) have made hardware accelerators essential for various high-performance computing (HPC) applications, including image classification, computer vision, and speech recognition. This survey summarizes and classifies the most recent developments in DL accelerators, focusing on their role in meeting the performance demands of HPC applications. We explore cutting-edge approaches to DL acceleration, covering not only GPU- and TPU-based platforms but also specialized hardware such as FPGA- and ASIC-based accelerators, Neural Processing Units, open hardware RISC-V-based accelerators, and co-processors. This survey also describes accelerators leveraging emerging memory technologies and computing paradigms, including 3D-stacked Processor-In-Memory, non-volatile memories like Resistive RAM and Phase Change Memories used for in-memory computing, as well as Neuromorphic Processing Units, and Multi-Chip Module-based accelerators. Furthermore, we provide insights into emerging quantum-based accelerators and photonics. Finally, this survey categorizes the most influential architectures and technologies from recent years, offering readers a comprehensive perspective on the rapidly evolving field of deep learning acceleration.
Cite
@article{arxiv.2306.15552,
title = {A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms},
author = {Cristina Silvano and Daniele Ielmini and Fabrizio Ferrandi and Leandro Fiorin and Serena Curzel and Luca Benini and Francesco Conti and Angelo Garofalo and Cristian Zambelli and Enrico Calore and Sebastiano Fabio Schifano and Maurizio Palesi and Giuseppe Ascia and Davide Patti and Nicola Petra and Davide De Caro and Luciano Lavagno and Teodoro Urso and Valeria Cardellini and Gian Carlo Cardarilli and Robert Birke and Stefania Perri},
journal= {arXiv preprint arXiv:2306.15552},
year = {2025}
}
Comments
Preprint version of our manuscript submitted to the journal @ ACM CSUR (58 pages including Appendix) on June 22nd, 2023. Major revision submitted on July 12th, 2024. Accepted for publication on March 22nd, 2025