English

A Reconfigurable Approximate Computing RISC-V Platform for Fault-Tolerant Applications

Hardware Architecture 2024-10-02 v1

Abstract

The demand for energy-efficient and high performance embedded systems drives the evolution of new hardware architectures, including concepts like approximate computing. This paper presents a novel reconfigurable embedded platform named "phoeniX", using the standard RISC-V ISA, maximizing energy efficiency while maintaining acceptable application-level accuracy. The platform enables the integration of approximate circuits at the core level with diverse structures, accuracies, and timings without requiring modifications to the core, particularly in the control logic. The platform introduces novel control features, allowing configurable trade-offs between accuracy and energy consumption based on specific application requirements. To evaluate the effectiveness of the platform, experiments were conducted on a set of applications, such as image processing and Dhrystone benchmark. The core with its original execution engine, occupies 0.024mm2 of area, with average power consumption of 4.23mW at 1.1V operating voltage, average energy-efficiency of 7.85pJ per operation at 620MHz frequency in 45nm CMOS technology. The configurable platform with a highly optimized 3-stage pipelined RV32I(E)M architecture, possesses a DMIPS/MHz of 1.89, and a CPI of 1.13, showcasing remarkable capabilities for an embedded processor.

Keywords

Cite

@article{arxiv.2410.00622,
  title  = {A Reconfigurable Approximate Computing RISC-V Platform for Fault-Tolerant Applications},
  author = {Arvin Delavari and Faraz Ghoreishy and Hadi Shahriar Shahhoseini and Sattar Mirzakuchaki},
  journal= {arXiv preprint arXiv:2410.00622},
  year   = {2024}
}

Comments

9 Pages, 7 figures, 2024 27th Euromicro Conference on Digital System Design (DSD), Paris, France, 2024

R2 v1 2026-06-28T19:03:44.130Z