A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices
Hardware Architecture
2016-08-31 v1
Abstract
Management of communication by on-line routing in new FPGAs with a large amount of logic resources and partial reconfigurability is a new challenging problem. A Network-on-Chip (NoC) typically uses packet routing mechanism, which has often unsafe data transfers, and network interface overhead. In this paper, circuit routing for such dynamic NoCs is investigated, and a practical 1-dimensional network with an efficient routing algorithm is proposed and implemented. Also, this concept has been extended to the 2-dimensional case. The implementation results show the low area overhead and high performance of this network.
Cite
@article{arxiv.cs/0503066,
title = {A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices},
author = {Ali Ahmadinia and Christophe Bobda and Ji Ding and Mateusz Majer and Juergen Teich and Sandor P. Fekete and Jan van der Veen},
journal= {arXiv preprint arXiv:cs/0503066},
year = {2016}
}
Comments
7 pages, 7 figures, 2 tables, Latex, to appear in International Workshop on Rapid System Prototyping (RSP 2005)