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Large Language Models (LLMs) often expend significant computational resources generating boilerplate responses, such as refusals, simple acknowledgements and casual greetings, which adds unnecessary cost and latency. To address this…

Artificial Intelligence · Computer Science 2025-10-28 Yuval Kainan , Shaked Zychlinski

The upgrades of the Belle experiment and the KEKB accelerator aim to increase the data set of the experiment by the factor 50. This will be achieved by increasing the luminosity of the accelerator which requires a significant upgrade of the…

Instrumentation and Detectors · Physics 2023-07-19 Dmytro Levit , Igor Konorov , Daniel Greenwald , Stephan Paul

This paper evaluates the use of pin and cycle accurate SystemC models for embedded system design exploration and early software development. The target system is MicroBlaze VanillaNet Platform running MicroBlaze uClinux operating system.…

Hardware Architecture · Computer Science 2011-11-09 Tero Rissa , Adam Donlin , Wayne Luk

We propose the use of sparse grids to accelerate particle-in-cell (PIC) schemes. By using the so-called `combination technique' from the sparse grids literature, we are able to dramatically increase the size of the spatial cells in…

Computational Physics · Physics 2016-12-21 Lee F Ricketson , Antoine J Cerfon

The increasing complexity and the short life cycles of embedded systems are pushing the current system-on-chip designs towards a rapid increasing on the number of programmable processing units, while decreasing the gate count for custom…

Hardware Architecture · Computer Science 2011-11-09 Alexandre M. Amory , Marcelo Lubaszewski , Fernando G. Moraes , Edson I. Moreno

High luminosity conditions at the LHC pose many unique challenges for potential silicon based track trigger systems. One of the major challenges is data formatting, where hits from thousands of silicon modules must first be shared and…

Instrumentation and Detectors · Physics 2016-11-15 Yasuyuki Okumura , Jamieson Olsen , Tiehui Ted Liu , Hang Yin

Fast Multipole Methods (FMM) are a fundamental operation for the simulation of many physical problems. The high performance design of such methods usually requires to carefully tune the algorithm for both the targeted physics and the…

Distributed, Parallel, and Cluster Computing · Computer Science 2012-06-04 Emmanuel Agullo , Béranger Bramas , Olivier Coulaud , Eric Darve , Matthias Messner , Takahashi Toru

Brain Computer Interfaces (BCIs) based on visual evoked potentials (VEP) allow for spelling from a keyboard of flashing characters. Among VEP BCIs, code-modulated visual evoked potentials (c-VEPs) are designed for high-speed communication .…

Human-Computer Interaction · Computer Science 2018-10-09 Federica Turi , Nathalie Gayraud , Maureen Clerc

The SeaQuest experiment (Fermilab E906) detects pairs of energetic {\mu}+ and {\mu}- produced in 120 GeV/c proton-nucleon interactions in a high rate environment. The trigger system consists of several arrays of scintillator hodoscopes and…

Embedded field programmable gate array (eFPGA) technology allows the implementation of reconfigurable logic within the design of an application-specific integrated circuit (ASIC). This approach offers the low power and efficiency of an ASIC…

Hardware Architecture · Computer Science 2024-08-29 Julia Gonski , Aseem Gupta , Haoyi Jia , Hyunjoon Kim , Lorenzo Rota , Larry Ruckman , Angelo Dragone , Ryan Herbst

A machine learning (ML) design framework is proposed for dynamically adjusting clock frequency based on propagation delay of individual instructions. A Random Forest model is trained to classify propagation delays in real-time, utilizing…

Hardware Architecture · Computer Science 2020-06-16 Arash Fouman Ajirlou , Inna Partin-Vaisband

We present an algorithm for cluster dynamics to efficiently simulate large systems on MIMD parallel computers with large numbers of processors. The method divides physical space into rectangular cells which are assigned to processors and…

High Energy Physics - Lattice · Physics 2009-10-22 Mike Flanigan , Pablo Tamayo

An FPGA-based online trigger system has been developed for the COMET Phase-I experiment. This experiment searches for muon-to-electron conversion, which has never been observed yet. A drift chamber and trigger counters detect a…

A definition for a class of asynchronous cellular arrays is proposed. An example of such asynchrony would be independent Poisson arrivals of cell iterations. The Ising model in the continuous time formulation of Glauber falls into this…

Distributed, Parallel, and Cluster Computing · Computer Science 2007-05-23 Boris D. Lubachevsky

We propose an effective parallel program debugging approach based on the timing annotation technique. With prevalent multi-core platforms, parallel programming is required to fully utilize the computing power. However, the non-determinism…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-09-10 Yun Chang , Hsin-I Wu , Ren-Song Tsay

The neural encoding by biological sensors of flying insects, which prefilters stimulus data before sending it to the central nervous system in the form of voltage spikes, enables sensing capabilities that are computationally low-cost while…

Systems and Control · Electrical Eng. & Systems 2022-06-07 Burak Boyacıoğlu , Alice C. Schwarze , Bingni W. Brunton , Kristi A. Morgansen

The International Large Detector (ILD) --a detector concept for the International Linear Collider (ILC)-- foresees a Time Projection Chamber (TPC) as its main tracking detector. Currently, the R&D efforts for such a TPC focus on studies…

The use of last generation Programmable Electronic Components makes possible the construction of very powerful and competitive special purpose computers. We have designed, constructed and tested a three-dimensional Spin Glass model…

Disordered Systems and Neural Networks · Physics 2009-10-31 A. Cruz , J. Pech , A. Tarancon , P. Tellez , C. L. Ullod , C. Ungil

The High Level Trigger (HLT) of the future ALICE heavy-ion experiment has to reduce its input data rate of up to 25 GB/s to at most 1.25 GB/s for output before the data is written to permanent storage. To cope with these data rates a large…

Distributed, Parallel, and Cluster Computing · Computer Science 2009-09-29 Timm M. Steinbeck

We describe a high-speed physical random number generator based on a hybrid Boolean network with autonomous and clocked logic gates, realized on a reconfigurable chip. The autonomous logic gates are arranged in a bidirectional ring topology…

Chaotic Dynamics · Physics 2013-04-30 David P. Rosin , Damien Rontani , Daniel J. Gauthier