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Many modern workloads such as neural network inference and graph processing are fundamentally memory-bound. For such workloads, data movement between memory and CPU cores imposes a significant overhead in terms of both latency and energy. A…

Hardware Architecture · Computer Science 2023-04-04 Juan Gómez-Luna , Izzat El Hajj , Ivan Fernandez , Christina Giannoula , Geraldo F. Oliveira , Onur Mutlu

Many tools and libraries employ hardware performance monitoring (HPM) on modern processors, and using this data for performance assessment and as a starting point for code optimizations is very popular. However, such data is only useful if…

Performance · Computer Science 2013-02-20 Jan Treibig , Georg Hager , Gerhard Wellein

Power consumption costs takes upto half of operational expenses of datacenters making power management a critical concern. Advances in processor technology provide fine-grained control over operating frequency and voltage of processors and…

Distributed, Parallel, and Cluster Computing · Computer Science 2014-11-13 Swetha P. T. Srinivasan , Umesh Bellur

Hardware performance monitoring (HPM) is a crucial ingredient of performance analysis tools. While there are interfaces like LIKWID, PAPI or the kernel interface perf\_event which provide HPM access with some additional features, many…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-10-12 Thomas Röhl , Jan Eitzinger , Georg Hager , Gerhard Wellein

This report focuses on the architecture and performance of the Intelligence Processing Unit (IPU), a novel, massively parallel platform recently introduced by Graphcore and aimed at Artificial Intelligence/Machine Learning (AI/ML)…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-12-10 Zhe Jia , Blake Tillman , Marco Maggioni , Daniele Paolo Scarpazza

Neuromorphic hardware platforms can significantly lower the energy overhead of a machine learning inference task. We present a design-technology tradeoff analysis to implement such inference tasks on the processing elements (PEs) of a Non-…

Neural and Evolutionary Computing · Computer Science 2022-03-11 Shihao Song , Adarsha Balaji , Anup Das , Nagarajan Kandasamy

Real-time simulation enables the understanding of system operating conditions by evaluating simulation models of physical components running synchronized at the real-time wall clock. Leveraging the real-time measurements of comprehensive…

Systems and Control · Electrical Eng. & Systems 2021-04-12 XiaoRui Liu , Juan Ospina , Ioannis Zografopoulos , Alonzo Russell , Charalambos Konstantinou

Developing parallel algorithms efficiently requires careful management of concurrency across diverse hardware architectures. C++ executors provide a standardized interface that simplifies the development process, allowing developers to…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-10-22 Karame Mohammadiporshokooh , Steven R. Brandt , Hartmut Kaiser

The advent of non-volatile memory (NVM) technologies like PCM, STT, memristors and Fe-RAM is believed to enhance the system performance by getting rid of the traditional memory hierarchy by reducing the gap between memory and storage. This…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-12-15 Ajay Singh , Marc Shapiro , Gael Thomas

Hybrid memory systems, comprised of emerging non-volatile memory (NVM) and DRAM, have been proposed to address the growing memory demand of applications. Emerging NVM technologies, such as phase-change memories (PCM), memristor, and 3D…

Hardware Architecture · Computer Science 2024-03-19 Fei Wen , Mian Qin , Paul V. Gratz , A. L. Narasimha Reddy

GPUs are the most popular platform for accelerating HPC workloads, such as artificial intelligence and science simulations. However, most microarchitectural research in academia relies on GPU core pipeline designs based on architectures…

Hardware Architecture · Computer Science 2025-10-30 Rodrigo Huerta , Mojtaba Abaie Shoushtary , José-Lorenzo Cruz , Antonio González

Microprocessors have revolutionized the world we live in and continuous efforts are being made to manufacture not only faster chips but also smarter ones. A number of techniques such as data level parallelism, instruction level parallelism…

Hardware Architecture · Computer Science 2011-10-18 Balaji Venu

Efficient on-device neural network (NN) inference offers predictable latency, improved privacy and reliability, and lower operating costs for vendors than cloud-based inference. This has sparked recent development of microcontroller-scale…

Machine Learning · Computer Science 2025-11-03 Josh Millar , Yushan Huang , Sarab Sethi , Hamed Haddadi , Anil Madhavapeddy

Multi-mode real-time systems are those which support applications with different modes of operation, where each mode is characterized by a specific set of tasks. At run-time, such systems can, at any time, be requested to switch from its…

Operating Systems · Computer Science 2015-03-18 Vincent Nelis , Patrick Meumeu Yomsi , Björn Andersson , Joël Goossens

Benchmarking and comparing performance of a scientific simulation across hardware platforms is a complex task. When the simulation in question is constructed with an asynchronous, many-task (AMT) runtime offloading work to GPUs, the task…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-10-13 Patrick Diehl , Gregor Daiss , Kevin Huck , Dominic Marcello , Sagiv Shiber , Hartmut Kaiser , Juhan Frank , Geoffrey C. Clayton , Dirk Pflueger

Hardware platforms in high performance computing are constantly getting more complex to handle even when considering multicore CPUs alone. Numerous features and configuration options in the hardware and the software environment that are…

Performance · Computer Science 2020-06-25 Christie L. Alappat , Johannes Hofmann , Georg Hager , Holger Fehske , Alan R. Bishop , Gerhard Wellein

Modern computing systems are embracing non-volatile memory (NVM) to implement high-capacity and low-cost main memory. Elevated operating voltages of NVM accelerate the aging of CMOS transistors in the peripheral circuitry of each memory…

Hardware Architecture · Computer Science 2020-12-02 Shihao Song , Anup Das , Onur Mutlu , Nagarajan Kandasamy

In High Performance Computing, systems are evaluated based on their computational throughput. However, performance in contemporary server processors is primarily limited by power and thermal constraints. Ensuring operation within a given…

Hardware Architecture · Computer Science 2021-10-26 Robert Schöne , Thomas Ilsche , Mario Bielert , Markus Velten , Markus Schmidl , Daniel Hackenberg

Resource-limited robots face significant challenges in executing computationally intensive tasks, such as locomotion and manipulation, particularly for real-time optimal control algorithms like Model Predictive Control (MPC). This paper…

We propose an integrated control architecture to address the gap that currently exists for efficient real-time implementation of MPC-based control approaches for highly nonlinear systems with fast dynamics and a large number of control…

Systems and Control · Electrical Eng. & Systems 2019-07-15 Anahita Jamshidnejad , Gabriel Gomes , Alexandre M. Bayen , Bart De Schutter