Related papers: TDC Chip and Readout Driver Developments for COMPA…

We have developed two radiation-hard ASICs for optical data transmission in the ATLAS pixel detector at the LHC at CERN: a driver chip for a Vertical Cavity Surface Emitting Laser (VCSEL) diode for 80 Mbit/s data transmission from the…

We present the first characterization results of Timespot1, an ASIC designed in CMOS 28 nm technology, featuring a $32 \times 32$ pixel matrix with a pitch of $55 ~ \mu m$. Timespot1 is the first small-size prototype, conceived to readout…

A major upgrade of the ALICE experiment is in progress and will result in high-rate data taking during LHC Run 3 (2022-2024). The LHC interaction rate at Point 2 where the ALICE experiment is located will be increased to $50\ \mathrm{kHz}$…

The ATLAS experiment will replace the present Small Wheel (SW) detector with a New Small Wheel detector (NSW) aiming to improve the performance of muon triggering and precision tracking in the endcap region at the High-Luminosity LHC.…

One of candidates for the International Linear Collider(ILC)'s vertex detector is the Fine Pixel CCD (FPCCD) with a pixel size of 5 \times 5 (\mum^2). Sensor and readout systems are currently being studied and prototypes have been…

This paper presents the NSX front-end ASIC, being developed to read charge signals from the HEMA and WFM X-ray detectors for the STROBE-X mission. The ASIC reads out signals from up to 64 anodes of linear Silicon Drift Detectors (SDDs).…

A fast readout system for the upgrade of the COMPASS RICH detector has been developed and successfully used for data taking in 2006 and 2007. The new readout system for the multi-anode PMTs in the central part of the photon detector of the…

The design, construction, and commissioning of the ALICE Time-Projection Chamber (TPC) is described. It is the main device for pattern recognition, tracking, and identification of charged particles in the ALICE experiment at the CERN LHC.…

A 64-channel mixed-mode ASIC, suitable for particle detectors of large dynamic range and high capacitance up to hundreds of pF, is presented here. Each channel features an analogue front-end for signal amplification and filtering, and a…

The SemiConductor Tracker (SCT) together with the Pixel detector and the Transition Radiation Tracker (TRT) form the central tracking system of the ATLAS experiment at the LHC. It consists of single-sided microstrip silicon sensors, which…

We present the design and characterization of TIGER (Turin Integrated Gem Electronics for Readout), a 64-channel ASIC developed for the readout of the CGEM (Cylindrical Gas Electron Multiplier) detector, the proposed inner tracker for the…

Time and charge measurements over a large dynamic range from 1 Photo Electron (P.E.) to 4000 P.E. are required for the Water Cherenkov Detector Array (WCDA), which is one of the key components in the Large High Altitude Air Shower…

We designed a versatile analog front-end chip, called LTARS, for TPC-applications, primarily targeted at dual-phase liquid Ar-TPCs for neutrino experiments and negative-ion $\mu$-TPCs for directional dark matter searches. Low-noise…

The high-luminosity upgrade of the CERN LHC requires the replacement of the CMS tracking detector to cope with the increased radiation fluence while maintaining its excellent performance. An extensive R\&D program, aiming at using 3D pixel…

The ALICE experiment at CERN is undergoing a major upgrade during the Long Shutdown 2 (LS2) of the LHC during 2019-2020. The key elements regarding the central barrel are the installation of a new Inner Tracking System (ITS) and the upgrade…

The ALICE experiment at CERN is preparing for a major upgrade for the third phase of data taking run (Run 3), when the high luminosity phase of the Large Hadron Collider (LHC) starts. The increase in the beam luminosity will result in high…

We develop the vertex detector for the international linear collider (ILC) using the FPCCD (Fine Pixel CCD), whose pixel size is 5 x 5 um2. Together with the FPCCD sensor, a prototype of the readout ASIC was developed in 2008. The readout…

The PSEC4 custom integrated circuit was designed for the recording of fast waveforms for use in large-area time-of-flight detector systems. The ASIC has been fabricated using the IBM-8RF 0.13 micron CMOS process. On each of 6 analog…

An Application Specific Integrated Circuit (ASIC), called RIGEL, designed for the sparse readout of a Silicon Pixel Drift Detector (PixDD) for space applications is presented.The low leakage current (less than 1 pA at +20 {\deg}C) and anode…

We present the first results from the HPSoC ASIC designed for readout of Ultra-fast Silicon Detectors. The 4-channel ASIC manufactured in 65 nm CMOS by TSMC has been optimized for 50 um thick AC-LGAD. The evaluation of the analog front end…