Related papers: First Experiences Integrating PC Distributed I/O I…
The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of LHC. Taking advantage of the long shutdown, the detector was extracted from the experiment and brought to surface, to equip it with new…
The H- Accelerator consists of a 750 keV Cockcroft Walton preaccelerator and an Alvarez type 50 MeV linac. The accelerator has been in operation since 1961. Since 1981, it has been used as the injector for the Intense Pulsed Neutron Source…
After the successful LHC operation at the center-of-mass energies of 7 and 8 TeV in 2010-2012, plans are actively advancing for a series of upgrades of the accelerator, culminating roughly ten years from now in the high-luminosity LHC…
The ALICE experiment has undergone a major upgrade for LHC Run 3 and will collect data at an interaction rate 50 times larger than before. The new computing scheme for Run 3 replaces the traditionally separate online and offline frameworks…
The measurement of Standard Model processes will be an important first step towards exploiting the discovery potential of the Large Hadron Collider, the highest energy accelerator ever built that will begin operation in the fall 2009. This…
The Dynamic PicoProbe at Argonne National Laboratory is undergoing upgrades that will enable it to produce up to 100s of GB of data per day. While this data is highly important for both fundamental science and industrial applications, there…
Due to decelerating gains in single-core CPU performance, computationally expensive simulations are increasingly executed on highly parallel hardware platforms. Agent-based simulations, where simulated entities act with a certain degree of…
The ATLAS trigger system is based on three levels of event selection that select the physics of interest from an initial bunch-crossing rate of 40 MHz. During nominal LHC operations at a luminosity of 10^34 cm^-2 s^-1, decisions must be…
The ATLAS Fast TracKer (FTK) was designed to provide full tracking for the ATLAS high-level trigger by using pattern recognition based on Associative Memory (AM) chips and fitting in high-speed field programmable gate arrays. The tracks…
The control system of the VEPP-4 facility was designed more than fifteen years ago and based on the home-developed CAMAC-embedded minicomputers Odrenok [1]. Five years ago, all computers were connected via Ethernet network. This step…
The Spallation Neutron Source (SNS) is a partnership between six laboratories. To ensure a truly integrated control system, many standards have been agreed upon, including the use of EPICS as the basic toolkit. However, unique within the…
Recent multi-LLM agent systems have shown promising capabilities for automated problem-solving, yet they predominantly rely on frozen agents or static fine-tuning pipelines. To address this limitation, our primary contribution is ATLAS…
The Spallation Neutron Source (SNS) vacuum instrumentation and control systems are being designed at Lawrence Berkeley National Laboratory (LBNL), Brookhaven National Laboratory (BNL), Thomas Jefferson National Accelerator facility (TJNAF)…
A new Muon-to-Central-Trigger Processor Interface (MUCTPI) was built as part of the upgrade of the ATLAS Level-1 trigger system for the next Run of the Large Hadron Collider at CERN. The MUCTPI has 208 high-speed optical serial links for…
This paper describes the ATLAS production tool AtCom (for ATLAS Commander). The purpose of the tool is to automate as much as possible the task of a production manager: defining and submitting jobs in large quantities, following up upon…
In the future ALICE heavy ion experiment at CERN's Large Hadron Collider input data rates of up to 25 GB/s have to be handled by the High Level Trigger (HLT) system, which has to scale them down to at most 1.25 GB/s before being written to…
The new simulation for the ATLAS detector at LHC is performed using Geant4 in a complete OO/C++ environment. In this framework the simulation of the various test beams for the different ATLAS subdetectors offers an excellent opportunity to…
For the last three decades a core use of FPGAs has been for processing communication: FPGA-based SmartNICs are in widespread use from the datacenter to IoT. Augmenting switches with FPGAs, however, has been less studied, but has numerous…
This paper presents techniques for theoretically and practically efficient and scalable Schr\"odinger-style quantum circuit simulation. Our approach partitions a quantum circuit into a hierarchy of subcircuits and simulates the subcircuits…
The optimization of an accelerator relies on the ability to monitor the behavior of the beam in an intelligent and timely fashion. The use of processor-driven front-ends allowed for the deployment of smart systems in the field for improved…