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Graph neural networks are increasingly adopted in trigger systems for collider experiments, where strict latency and throughput constraints render deployment on embedded platforms challenging. As detectors move towards higher granularity,…

Hardware Architecture · Computer Science 2026-05-12 Marc Neu , Frank Baptist , Thomas Lobmaier , Fabio Papagno , Torben Ferber , Jürgen Becker

The GRadient Ascent Pulse Engineering (GRAPE) method is widely used for optimization in quantum control. GRAPE is gradient search method based on exact expressions for gradient of the control objective. It has been applied to coherently…

Quantum Physics · Physics 2023-07-18 Vadim Petruhanov , Alexander Pechen

Astrophysical Challenges which demand the solution of the one million (or more) gravitating body problem are briefly discussed for the fields of cosmology, galactic nuclei and globular star clusters. Results from the classical three-body…

Astrophysics · Physics 2016-11-23 R. Spurzem , A. Kugel

We introduce Spiral, a third-order integration algorithm for the rotational motion of extended bodies. It requires only one force calculation per time step, does not require quaternion normalization at each time step, and can be formulated…

We report a novel application of graphics processing units (GPUs) for the purpose of accelerating the search pipelines for gravitational waves from coalescing binaries of compact objects. A speed-up of 16 fold has been achieved compared…

General Relativity and Quantum Cosmology · Physics 2010-05-25 Shin Kee Chung , Linqing Wen , David Blair , Kipp Cannon , Amitava Datta

Numerical optimal control (GRAPE) can in principle discover pulse shapes that suppress all coherent gate error to machine precision. But when does that capability actually matter? We present a systematic comparison of Gaussian, DRAG, and…

Quantum Physics · Physics 2026-02-16 Rylan Malarchick

Increasing demands for computing power also propel the need for energy-efficient SoC accelerator architectures. One class for such accelerators are so-called processor arrays, which typically integrate a two-dimensional mesh of…

Hardware Architecture · Computer Science 2025-02-28 Dominik Walter , Marita Halm , Daniel Seidel , Indrayudh Ghosh , Christian Heidorn , Frank Hannig , Jürgen Teich

Graphics Processing Unit, or GPUs, have been successfully adopted both for graphic computation in 3D applications, and for general purpose application (GP-GPUs), thank to their tremendous performance-per-watt. Recently, there is a big…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-10-03 Paolo Burgio

Graph is a well known data structure to represent the associated relationships in a variety of applications, e.g., data science and machine learning. Despite a wealth of existing efforts on developing graph processing systems for improving…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-02-28 Chuangyi Gui , Long Zheng , Bingsheng He , Cheng Liu , Xinyu Chen , Xiaofei Liao , Hai Jin

Advancing Multi-Agent Pathfinding (MAPF) and Multi-Robot Motion Planning (MRMP) requires platforms that enable transparent, reproducible comparisons across modeling choices. Existing tools either scale under simplifying assumptions (grids,…

FPGA accelerators designed for graph processing are gaining popularity. Domain Specific Language (DSL) frameworks for graph processing can reduce the programming complexity and development cost of algorithm design. However,…

Hardware Architecture · Computer Science 2022-02-28 Jing Wang , Jinyang Guo , Chao Li

Reconfigurable computing refers to the use of processors, such as Field Programmable Gate Arrays (FPGAs), that can be modified at the hardware level to take on different processing tasks. A reconfigurable computing platform describes the…

Hardware Architecture · Computer Science 2007-05-23 Darran Nathan , Kelvin Lim Mun Kit , Kelly Choo Hon Min , Philip Wong Jit Chin , Andreas Weisensee

Graph Neural Networks (GNNs) have shown success in many real-world applications that involve graph-structured data. Most of the existing single-node GNN training systems are capable of training medium-scale graphs with tens of millions of…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-03-02 Yi-Chien Lin , Viktor Prasanna

Graph Neural Networks (GNNs) have shown great success in many applications such as recommendation systems, molecular property prediction, traffic prediction, etc. Recently, CPU-FPGA heterogeneous platforms have been used to accelerate many…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-12-23 Yi-Chien Lin , Bingyi Zhang , Viktor Prasanna

In this paper, the acceleration of algorithms using a design of a field programmable gate array (FPGA) as a prototype of a static dataflow architecture is discussed. The static dataflow architecture using operators interconnected by…

Hardware Architecture · Computer Science 2015-03-13 Jorge Luiz e Silva , Joelmir Jose Lopes , Bruno de Abreu Silva , Antonio Carlos Fernandes da Silva

Modern multicore systems are migrating from homogeneous systems to heterogeneous systems with accelerator-based computing in order to overcome the barriers of performance and power walls. In this trend, FPGA-based accelerators are becoming…

Hardware Architecture · Computer Science 2020-09-04 Zhe Lin , Sharad Sinha , Hao Liang , Liang Feng , Wei Zhang

Recent advances in graph processing on FPGAs promise to alleviate performance bottlenecks with irregular memory access patterns. Such bottlenecks challenge performance for a growing number of important application areas like machine…

Hardware Architecture · Computer Science 2022-06-20 Jonas Dann , Daniel Ritter , Holger Fröning

Quantum circuit simulation is important in the evolution of quantum software and hardware. Novel algorithms can be developed and evaluated by performing quantum circuit simulations on classical computers before physical quantum computers…

Quantum Physics · Physics 2024-10-22 Yu-Tsung Wu , Po-Hsuan Huang , Kai-Chieh Chang , Chia-Heng Tu , Shih-Hao Hung

While coarse-grained reconfigurable arrays (CGRAs) have emerged as promising programmable accelerator architectures, pipelining applications running on CGRAs is required to ensure high maximum clock frequencies. Current CGRA compilers…

Hardware Architecture · Computer Science 2022-11-24 Jackson Melchert , Yuchen Mei , Kalhan Koul , Qiaoyi Liu , Mark Horowitz , Priyanka Raina

Current supercomputers often have a heterogeneous architecture using both CPUs and GPUs. At the same time, numerical simulation tasks frequently involve multiphysics scenarios whose components run on different hardware due to multiple…

Computational Engineering, Finance, and Science · Computer Science 2024-12-10 Samuel Kemmler , Christoph Rettinger , Ulrich Rüde , Pablo Cuéllar , Harald Köstler