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Existing low-bit Microscaling (MX) formats, such as MXFP4, often suffer from substantial accuracy degradation due to the use of a shared scaling factor with the Power-of-Two format. In this work, we explore strategies that introduce minimal…

Hardware Architecture · Computer Science 2026-01-29 Weiming Hu , Zihan Zhang , Haoyan Zhang , Chen Zhang , Cong Guo , Yu Feng , Tianchi Hu , Guanglin Li , Guipeng Hu , Junsong Wang , Jingwen Leng

Compared to the first generation of deep neural networks, dominated by regular, compute-intensive kernels such as matrix multiplications (MatMuls) and convolutions, modern decoder-based transformers interleave attention, normalization, and…

Hardware Architecture · Computer Science 2026-03-06 Max Wipfli , Gamze İslamoğlu , Navaneeth Kunhi Purayil , Angelo Garofalo , Luca Benini

Narrow bit-width data formats are key to reducing the computational and storage costs of modern deep learning applications. This paper evaluates Microscaling (MX) data formats that combine a per-block scaling factor with narrow…

Using fewer bits to represent model parameters and related tensors during pre-training has become a required technique for improving GPU efficiency without sacrificing accuracy. Microscaling (MX) formats introduced in NVIDIA Blackwell…

Machine Learning · Computer Science 2025-08-20 Asit Mishra , Dusan Stosic , Simon Layton , Paulius Micikevicius

Model quantization represents both parameters (weights) and intermediate values (activations) in a more compact format, thereby directly reducing both computational and memory cost in hardware. The quantization of recent large language…

Hardware Architecture · Computer Science 2024-04-22 Jianyi Cheng , Cheng Zhang , Zhewen Yu , Christos-Savvas Bouganis , George A. Constantinides , Yiren Zhao

Quantization-aware training (QAT) is typically performed for a single target numeric format, while practical deployments often need to choose numerical precision at inference time based on hardware support or runtime constraints. We study…

Machine Learning · Computer Science 2026-04-02 Zifei Xu , Sayeh Sharify , Hesham Mostafa

Reduced-precision data formats are crucial for cost-effective serving of large language models (LLMs). While numerous reduced-precision formats have been introduced thus far, they often require intrusive modifications to the software…

Machine Learning · Computer Science 2025-10-17 Jungi Lee , Junyong Park , Soohyun Cha , Jaehoon Cho , Jaewoong Sim

Autonomous robots require efficient on-device learning to adapt to new environments without cloud dependency. For this edge training, Microscaling (MX) data types offer a promising solution by combining integer and floating-point…

Hardware Architecture · Computer Science 2025-12-16 Stef Cuyckens , Xiaoling Yi , Nitish Satya Murthy , Chao Fang , Marian Verhelst

Fast and energy-efficient low-bitwidth floating-point (FP) arithmetic is essential for Artificial Intelligence (AI) systems. Microscaling (MX) standardized formats have recently emerged as a promising alternative to baseline low-bitwidth FP…

Hardware Architecture · Computer Science 2025-05-20 Gamze İslamoğlu , Luca Bertaccini , Arpan Suravi Prasad , Francesco Conti , Angelo Garofalo , Luca Benini

Large Language Models (LLMs) have intensified the need for low-precision formats that enable efficient, large-scale inference. The Open Compute Project (OCP) Microscaling (MX) standard is attractive due to its favorable hardware efficiency,…

Training large language models is an expensive, compute-bound process that must be repeated as models scale, algorithms improve, and new data is collected. To address this, next-generation hardware accelerators increasingly support…

Machine Learning · Computer Science 2025-06-27 Huangyuan Su , Mujin Kwun , Stephanie Gil , Sham Kakade , Nikhil Anand

The proliferation of Transformer models is often constrained by the significant computational and memory bandwidth demands of deployment. To address this, we present MXFormer, a novel, hybrid, weight-stationary Compute-in-Memory (CIM)…

Hardware Architecture · Computer Science 2026-02-16 George Karfakis , Samyak Chakrabarty , Vinod Kurian Jacob , Siyun Qiao , Subramanian S. Iyer , Sudhakar Pamarti , Puneet Gupta

As large language models (LLMs) grow in parameter size and context length, computation precision has been reduced from 16-bit to 4-bit to improve inference efficiency. However, this reduction causes accuracy degradation due to activation…

Artificial Intelligence · Computer Science 2025-06-02 Janghwan Lee , Jiwoong Park , Jinseok Kim , Yongjik Kim , Jungju Oh , Jinwook Oh , Jungwook Choi

Modern AI hardware, such as Nvidia's Blackwell architecture, is increasingly embracing low-precision floating-point (FP) formats to handle the pervasive activation outliers in Large Language Models (LLMs). Despite this industry trend, a…

Machine Learning · Computer Science 2025-10-30 Mengzhao Chen , Meng Wu , Hui Jin , Zhihang Yuan , Jing Liu , Chaoyi Zhang , Yunshui Li , Jie Huang , Jin Ma , Zeyue Xue , Zhiheng Liu , Xingyan Bin , Ping Luo

As cutting-edge large language models (LLMs) continue to transform various industries, their fast-growing model size and sequence length have led to memory traffic and capacity challenges. Recently, AMD, Arm, Intel, Meta, Microsoft, NVIDIA,…

Hardware Architecture · Computer Science 2024-12-31 Yun-Chen Lo , Gu-Yeon Wei , David Brooks

The transfer of tensors from/to memory during neural network training dominates time and energy. To improve energy efficiency and performance, research has been exploring ways to use narrower data representations. So far, these attempts…

In this work, we propose a low-bit training framework for convolutional neural networks, which is built around a novel multi-level scaling (MLS) tensor format. Our framework focuses on reducing the energy consumption of convolution…

Machine Learning · Computer Science 2021-07-15 Kai Zhong , Xuefei Ning , Guohao Dai , Zhenhua Zhu , Tianchen Zhao , Shulin Zeng , Yu Wang , Huazhong Yang

Quantization significantly accelerates inference in large language models (LLMs) by replacing original high-precision matrices with low-precision counterparts. Recent advances in weight-activation quantization have primarily focused on…

Machine Learning · Computer Science 2026-03-31 Wenyuan Liu , Haoqian Meng , Yilun Luo , Yafei Zhao , Peng Zhang , Xindian Ma

High throughput and low latency inference of deep neural networks are critical for the deployment of deep learning applications. This paper presents the efficient inference techniques of IntelCaffe, the first Intel optimized deep learning…

Computer Vision and Pattern Recognition · Computer Science 2018-05-23 Jiong Gong , Haihao Shen , Guoming Zhang , Xiaoli Liu , Shane Li , Ge Jin , Niharika Maheshwari , Evarist Fomenko , Eden Segal

Low-precision formats have recently driven major breakthroughs in neural network (NN) training and inference by reducing the memory footprint of the NN models and improving the energy efficiency of the underlying hardware architectures.…

Hardware Architecture · Computer Science 2024-10-28 Luca Bertaccini , Gianna Paulin , Tim Fischer , Stefan Mach , Luca Benini
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