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In this paper, we propose an architecture of a novel adaptive fault-tolerant approximate multiplier tailored for ASIC-based DNN accelerators.

Ternary neural networks (TNNs) offer a superior accuracy-energy trade-off compared to binary neural networks. However, until now, they have required specialized accelerators to realize their efficiency potential, which has hindered…

Hardware Architecture · Computer Science 2024-05-30 Georg Rutishauser , Joan Mihali , Moritz Scherer , Luca Benini

The growing computational demands of machine learning (ML) workloads have driven the design of ML accelerators aiming at an optimal tradeoff between efficiency and flexibility. A widely explored architecture for flexible ML accelerators is…

Hardware Architecture · Computer Science 2025-06-13 Luca Colagrande , Lorenzo Leone , Maximilian Coco , Andrei Deaconeasa , Luca Benini

Multiplication is a fundamental operation in many applications, and multipliers are widely adopted in various circuits. However, optimizing multipliers is challenging due to the extensive design space. In this paper, we propose a multiplier…

Hardware Architecture · Computer Science 2024-12-30 Dongsheng Zuo , Jiadong Zhu , Yikang Ouyang , Yuzhe Ma

Multiplication is an indispensable operation in most of digital signal processing systems. Recently, many systems need to execute different types of algorithms on a multiplier. Therefore, it needs complicated computation and large area…

Hardware Architecture · Computer Science 2019-07-23 Seungbum Baek

Reconfigurable computing offers a good balance between flexibility and energy efficiency. When combined with software-programmable devices such as CPUs, it is possible to obtain higher performance by spatially distributing the…

Hardware Architecture · Computer Science 2024-04-22 Daniel Vazquez , Jose Miranda , Alfonso Rodriguez , Andres Otero , Pascuale Davide Schiavone , David Atienza

Handling vast amounts of data is crucial in today's world. The growth of high-performance computing has created a need for parallelization, particularly in the area of machine learning algorithms such as ANN (Approximate Nearest Neighbors).…

Machine Learning · Computer Science 2024-07-19 Konstantin Rumyantsev , Pavel Yakovlev , Andrey Gorshkov , Andrey P. Sokolov

We present PULP-NN, an optimized computing library for a parallel ultra-low-power tightly coupled cluster of RISC-V processors. The key innovation in PULP-NN is a set of kernels for Quantized Neural Network (QNN) inference, targeting byte…

Neural and Evolutionary Computing · Computer Science 2019-08-30 Angelo Garofalo , Manuele Rusci , Francesco Conti , Davide Rossi , Luca Benini

Computing-in-memory (CIM) is an emerging computing paradigm, offering noteworthy potential for accelerating neural networks with high parallelism, low latency, and energy efficiency compared to conventional von Neumann architectures.…

Neural and Evolutionary Computing · Computer Science 2024-09-30 Kam Chi Loong , Shihao Han , Sishuo Liu , Ning Lin , Zhongrui Wang

Neural Networks (NN) have been proven to be powerful tools to analyze Big Data. However, traditional CPUs cannot achieve the desired performance and/or energy efficiency for NN applications. Therefore, numerous NN accelerators have been…

Hardware Architecture · Computer Science 2021-03-24 Taoran Xiang , Lunkai Zhang , Shuqian An , Xiaochun Ye , Mingzhe Zhang , Yanhuan Liu , Mingyu Yan , Da Wang , Hao Zhang , Wenming Li , Ninghui Sun , Dongrui Fan

Computing-in-memory (CIM) is renowned in deep learning due to its high energy efficiency resulting from highly parallel computing with minimal data movement. However, current SRAM-based CIM designs suffer from long latency for loading…

Deep neural networks (DNNs) offer plenty of challenges in executing efficient computation at edge nodes, primarily due to the huge hardware resource demands. The article proposes HYDRA, hybrid data multiplexing, and runtime layer…

Hardware Architecture · Computer Science 2026-03-31 Sonu Kumar , Komal Gupta , Gopal Raut , Mukul Lokhande , Santosh Kumar Vishvakarma

Iterative algorithms are widely used in digital signal processing applications. With the case study of radio astronomy calibration processing, this work contributes towards revealing and exploiting the intrinsic error resilience of…

Signal Processing · Electrical Eng. & Systems 2025-02-21 G. A. Gillani , A. Krapukhin , A. B. J. Kokkeler

Neural network accelerators have been widely applied to edge devices for complex tasks like object tracking, image recognition, etc. Previous works have explored the quantization technologies in related lightweight accelerator designs to…

Hardware Architecture · Computer Science 2026-02-27 Yuhao Liu , Salim Ullah , Akash Kumar

The surge in AI usage demands innovative power reduction strategies. Novel Compute-in-Memory (CIM) architectures, leveraging advanced memory technologies, hold the potential for significantly lowering energy consumption by integrating…

Signal Processing · Electrical Eng. & Systems 2024-05-14 José Cubero-Cascante , Arunkumar Vaidyanathan , Rebecca Pelke , Lorenzo Pfeifer , Rainer Leupers , Jan Moritz Joseph

The emergence of Deep Neural Networks (DNNs) in mission- and safety-critical applications brings their reliability to the front. High performance demands of DNNs require the use of specialized hardware accelerators. Systolic array…

Hardware Architecture · Computer Science 2025-11-05 Natalia Cherezova , Artur Jutman , Maksim Jenihhin

Electronic devices primarily aim to offer low power consumption, high speed, and a compact area. The performance of very large-scale integration (VLSI) devices is influenced by arithmetic operations, where multiplication is a crucial…

Hardware Architecture · Computer Science 2025-06-16 Ali Ranjbar , Elham Esmaeili , Roghayeh Rafieisangari , Nabiollah Shiri

Extreme edge platforms, such as in-vehicle smart devices, require efficient deployment of quantized deep neural networks (DNNs) to enable intelligent applications with limited amounts of energy, memory, and computing resources. However,…

Hardware Architecture · Computer Science 2024-03-28 Longwei Huang , Chao Fang , Qiong Li , Jun Lin , Zhongfeng Wang

Machine learning based on neural networks has advanced rapidly, but the high energy consumption required for training and inference remains a major challenge. Hyperdimensional Computing (HDC) offers a lightweight, brain-inspired alternative…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-11-10 Wakuto Matsumi , Riaz-Ul-Haque Mian

Neuromorphic accelerators promise unparalleled energy efficiency and computational density for spiking neural networks (SNNs), especially in edge intelligence applications. However, most existing platforms exhibit rigid architectures with…

Hardware Architecture · Computer Science 2026-02-23 Mohammad Farahani , Mohammad Rasoul Roshanshah , Saeed Safari