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Invertible logic can operate in one of two modes: 1) a forward mode, in which inputs are presented and a single, correct output is produced, and 2) a reverse mode, in which the output is fixed and the inputs take on values consistent with…
Emerging memristor-based array architectures have been effectively employed in non-volatile memories and neuromorphic computing systems due to their density, scalability and capability of storing information. Nonetheless, to demonstrate a…
Memristive devices are commonly benchmarked by the multi-level programmability of their resistance states. Neural networks utilizing memristor crossbar arrays as synaptic layers largely rely on this feature. However, the dynamical…
Emerging non-volatile memory (NVM), or memristive, devices promise energy-efficient realization of deep learning, when efficiently integrated with mixed-signal integrated circuits on a CMOS substrate. Even though several algorithmic…
Non-Boolean computing based on emerging post-CMOS technologies can potentially pave the way for low-power neural computing platforms. However, existing work on such emerging neuromorphic architectures have either focused on solely mimicking…
Large spiking neural networks (SNNs) require ultra-low power and low variability hardware for neuromorphic computing applications. Recently, a band-to-band tunneling-based (BTBT) integrator, enabling sub-kHz operation of neurons with area…
We present the design and numerical simulation of a spiking neuron capable of on-chip machine learning. Built within the CMOS+X framework, the spiking neuron consists of an NMOS transistor combined with a magnetic tunnel junction (MTJ).…
Conventional 6T SRAM is used in microprocessors in the cache memory design. The basic 6T SRAM cell and a 6 bit memory array layout are designed in LEdit. The design and analysis of key SRAM components, sense amplifiers, decoders, write…
In this paper, a new design has been proposed for the realization of high-frequency memcapacitor emulators built with three OTAs. This paper also proposes the application of memcapacitor as an amplitude modulator. Furthermore, applications…
The quest for energy-efficient, scalable neuromorphic computing has elevated compute-in-memory (CIM) architectures to the forefront of hardware innovation. While memristive memories have been extensively explored for synaptic implementation…
A Ferroelectric Analog Non-Volatile Memory based on a WOx electrode and ferroelectric HfZrO$_4$ layer is fabricated at a low thermal budget (~375$^\circ$C), enabling BEOL processes and CMOS integration. The devices show suitable properties…
Transition metal oxides (TMOs) and post-TMOs (PTMOs), when doped with Carbon, show non-volatile current-voltage (I-V) characteristics, which are both universal and repeatable. We have shown spectroscopic evidence of the introduction of…
Brain inspired circuits can provide an alternative solution to implement computing architectures taking advantage of fault tolerance and generalisation ability of logic gates. In this brief, we advance over the memristive threshold circuit…
We present a multiscale simulation framework to compute the current vs. voltage (I-V ) characteristics of metal/oxide/metal structures building the core of conductive bridging random access memory (CBRAM) cells and to shed light on their…
Real-time detection of moving objects involves memorisation of features in the template image and their comparison with those in the test image. At high sampling rates, such techniques face the problems of high algorithmic complexity and…
Memristors are non-volatile nano-resistors. Their resistance can be tuned by applied currents or voltages and set to a large number of levels between two limit values. Thanks to these properties, memristors are ideal building blocks for a…
In pixelized detectors, reducing power consumption in the front end ASIC chips becomes a crucial demand. Optimization based on mature pre-amplifier schemes today is unlikely to bring sufficient improvements. A new CMOS front-end gain stage…
The increasing capacity of modern computers, driven by Moore's Law, is accompanied by smaller noise margins and higher error rates. In this paper we propose a memory device, consisting of a ring of two identical overdamped bistable…
We propose a novel topological photonic memory that encodes information through dynamically controllable Chern numbers in a two-band topological photonic system. Utilizing a honeycomb lattice photonic crystal, the memory leverages…
Brain-inspired non-Boolean computing offers intrinsic error tolerance and parallelism, but its practical deployment is limited by the lack of compact, energy-efficient spiking hardware compatible with large-scale integration. Mott…