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Large language models (LLMs) have shown promise in register-transfer level (RTL) design automation, but direct RTL generation remains difficult to validate, optimize, and integrate with compiler-based hardware design flows. Hardware…

Hardware Architecture · Computer Science 2026-05-19 Shuo Yin , Yihe Wang , Lancheng Zou , Xufeng Yao , Tinghuan Chen , Chen Bai , Zhengrong Wang , Tsung-Yi Ho , Bei Yu

Multi-Level Intermediate Representation (MLIR) is gaining increasing attention in reconfigurable hardware communities due to its capability to represent various abstract levels for software compilers. This project aims to be the first to…

Hardware Architecture · Computer Science 2024-01-22 Zhenya Zang , Uwe Dolinsky , Pietro Ghiglio , Stefano Cherubin , Mehdi Goli , Shufan Yang

Register Transfer Level (RTL) code optimization is crucial for enhancing the efficiency and performance of digital circuits during early synthesis stages. Currently, optimization relies heavily on manual efforts by skilled engineers, often…

Hardware Architecture · Computer Science 2024-09-19 Xufeng Yao , Yiwen Wang , Xing Li , Yingzhao Lian , Ran Chen , Lei Chen , Mingxuan Yuan , Hong Xu , Bei Yu

Many state-of-the-art Segment Routing (SR) Traffic Engineering (TE) algorithms rely on Linear Program (LP)-based optimization. However, the poor scalability of the latter and the resulting high computation times impose severe restrictions…

Networking and Internet Architecture · Computer Science 2024-08-27 Alexander Brundiers , Timmy Schüller , Nils Aschenbruck

Traditional compilers operate on a single generic intermediate representation (IR). These IRs are usually low-level and close to machine instructions. As a result, optimizations relying on domain-specific information are either not possible…

Hyperparameter tuning of multi-stage pipelines introduces a significant computational burden. Motivated by the observation that work can be reused across pipelines if the intermediate computations are the same, we propose a pipeline-aware…

Machine Learning · Computer Science 2019-03-14 Liam Li , Evan Sparks , Kevin Jamieson , Ameet Talwalkar

Manual optimization of Register Transfer Level (RTL) datapath is commonplace in industry but holds back development as it can be very time consuming. We utilize the fact that a complex transformation of one RTL into another equivalent RTL…

Hardware Architecture · Computer Science 2022-07-27 Samuel Coward , George A. Constantinides , Theo Drane

Modern information retrieval systems often rely on multiple components executed in a pipeline. In a research setting, this can lead to substantial redundant computations (e.g., retrieving the same query multiple times for evaluating…

Information Retrieval · Computer Science 2025-04-15 Sean MacAvaney , Craig Macdonald

Region-based compilation repartitions a program into more desirable compilation units using profiling information and procedure inlining to enable region formation analysis. Heuristics play a key role in determining when it is most…

Distributed, Parallel, and Cluster Computing · Computer Science 2007-05-23 Thomas P. Way , Lori L. Pollock

Fast machine code generation is especially important for fast start-up just-in-time compilation, where the compilation time is part of the end-to-end latency. However, widely used compiler frameworks like LLVM do not prioritize fast…

Programming Languages · Computer Science 2025-05-29 Tobias Schwarz , Tobias Kamm , Alexis Engelke

Reinforcement Learning (RL) is increasingly utilized to enhance the reasoning capabilities of Large Language Models (LLMs). However, effectively scaling these RL methods presents significant challenges, primarily due to the difficulty in…

Machine Learning · Computer Science 2025-09-30 Alexandre Piché , Ehsan Kamalloo , Rafael Pardinas , Xiaoyin Chen , Dzmitry Bahdanau

Manual RTL design and optimization remains prevalent across the semiconductor industry because commercial logic and high-level synthesis tools are unable to match human designs. Our experience in industrial datapath design demonstrates that…

Hardware Architecture · Computer Science 2024-06-19 Samuel Coward , Theo Drane , George A. Constantinides

An optimizing compiler consists of a front end parsing a textual programming language into an intermediate representation (IR), a middle end performing optimizations on the IR, and a back end lowering the IR to a target representation (TR)…

Programming Languages · Computer Science 2011-11-22 Sebastian Buchwald , Edgar Jakumeit

In digital IC design, compared with post-synthesis netlists or layouts, the early register-transfer level (RTL) stage offers greater optimization flexibility for both designers and EDA tools. However, timing information is typically…

Hardware Architecture · Computer Science 2024-05-07 Wenji Fang , Shang Liu , Hongce Zhang , Zhiyao Xie

The emergence of machine learning, image and audio processing on edge devices has motivated research towards power efficient custom hardware accelerators. Though FPGAs are an ideal target for energy efficient custom accelerators, the…

Hardware Architecture · Computer Science 2021-03-02 Kingshuk Majumder , Uday Bondhugula

Optimizing Register Transfer Level (RTL) code is crucial for improving the power, performance, and area (PPA) of digital circuits in the early stages of synthesis. Manual rewriting, guided by synthesis feedback, can yield high-quality…

Hardware Architecture · Computer Science 2025-09-23 Yiting Wang , Wanghao Ye , Ping Guo , Yexiao He , Ziyao Wang , Bowei Tian , Shwai He , Guoheng Sun , Zheyu Shen , Sihan Chen , Ankur Srivastava , Qingfu Zhang , Gang Qu , Ang Li

Recently, large language models (LLMs) have demonstrated excellent performance, inspiring researchers to explore their use in automating register transfer level (RTL) code generation and improving hardware design efficiency. However, the…

Computation and Language · Computer Science 2025-04-24 Peiyang Wu , Nan Guo , Xiao Xiao , Wenming Li , Xiaochun Ye , Dongrui Fan

Inference of Large Language Models (LLMs) across computer clusters has become a focal point of research in recent times, with many acceleration techniques taking inspiration from CPU speculative execution. These techniques reduce…

Computation and Language · Computer Science 2024-11-19 Branden Butler , Sixing Yu , Arya Mazaheri , Ali Jannesari

Massive, multi-language, monolithic repositories form the backbone of many modern, complex software systems. To ensure consistent code quality while still allowing fast development cycles, Continuous Integration (CI) is commonly applied.…

Software Engineering · Computer Science 2025-01-22 Daniel Schwendner , Maximilian Jungwirth , Martin Gruber , Martin Knoche , Daniel Merget , Gordon Fraser

To take full advantage of a specific hardware target, performance engineers need to gain control on compilers in order to leverage their domain knowledge about the program and hardware. Yet, modern compilers are poorly controlled, usually…

Programming Languages · Computer Science 2024-09-10 Martin Paul Lücke , Oleksandr Zinenko , William S. Moses , Michel Steuwer , Albert Cohen
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