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Digital Compute-in-Memory (CIM) architectures have shown great promise in Deep Neural Network (DNN) acceleration by effectively addressing the "memory wall" bottleneck. However, the development and optimization of digital CIM accelerators…

Hardware Architecture · Computer Science 2025-05-05 Yingjie Qi , Jianlei Yang , Yiou Wang , Yikun Wang , Dayu Wang , Ling Tang , Cenlin Duan , Xiaolin He , Weisheng Zhao

Coherent Ising Machines (CIMs) have emerged as a hybrid form of quantum computing devices designed to solve NP-complete problems, offering an exciting opportunity for discovering optimal solutions. Despite challenges such as susceptibility…

Content addressable memory (CAM) stands out as an efficient hardware solution for memory-intensive search operations by supporting parallel computation in memory. However, developing a CAM-based accelerator architecture that achieves…

Hardware Architecture · Computer Science 2024-03-11 Mengyuan Li , Shiyi Liu , Mohammad Mehdi Sharifi , X. Sharon Hu

Quantization has become one of the most effective methodologies to compress LLMs into smaller size. However, the existing quantization solutions still show limitations of either non-negligible accuracy drop or low system efficiency. In this…

Machine Learning · Computer Science 2026-04-23 Zhen Zheng , Xiaonan Song , Chuanjie Liu

Large language models (LLMs) have demonstrated exceptional proficiency in understanding and generating human language, but efficient inference on resource-constrained embedded devices remains challenging due to large model sizes and…

Hardware Architecture · Computer Science 2025-07-15 Weihong Xu , Haein Choi , Po-kai Hsu , Shimeng Yu , Tajana Rosing

We introduce QUICK, a group of novel optimized CUDA kernels for the efficient inference of quantized Large Language Models (LLMs). QUICK addresses the shared memory bank-conflict problem of state-of-the-art mixed precision matrix…

Machine Learning · Computer Science 2024-02-16 Taesu Kim , Jongho Lee , Daehyun Ahn , Sarang Kim , Jiwoong Choi , Minkyu Kim , Hyungjun Kim

Recent research has sought to accelerate cryptographic hash functions as they are at the core of modern cryptography. Traditional designs, however, suffer from the von Neumann bottleneck that originates from the separation of processing and…

Hardware Architecture · Computer Science 2022-06-03 Batel Oved , Orian Leitersdorf , Ronny Ronen , Shahar Kvatinsky

The rapid growth of deep neural network (DNN) workloads has significantly increased the demand for large-capacity on-chip SRAM in machine learning (ML) applications, with SRAM arrays now occupying a substantial fraction of the total die…

Hardware Architecture · Computer Science 2025-12-30 Subhradip Chakraborty , Ankur Singh , Xuming Chen , Gourav Datta , Akhilesh R. Jaiswal

The rise of LLMs has driven demand for private serverless deployments, characterized by moderate-sized models and infrequent requests. While existing serverless solutions follow exclusive GPU allocation, we take a step back to explore…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-16 Chuhao Xu , Zijun Li , Quan Chen , Han Zhao , Xueyan Tang , Minyi Guo

Digital processing-in-memory (PIM) architectures are rapidly emerging to overcome the memory-wall bottleneck by integrating logic within memory elements. Such architectures provide vast computational power within the memory itself in the…

Hardware Architecture · Computer Science 2023-04-18 Orian Leitersdorf , Dean Leitersdorf , Jonathan Gal , Mor Dahan , Ronny Ronen , Shahar Kvatinsky

In this paper, we develop an in-memory analog computing (IMAC) architecture realizing both synaptic behavior and activation functions within non-volatile memory arrays. Spin-orbit torque magnetoresistive random-access memory (SOT-MRAM)…

Hardware Architecture · Computer Science 2021-09-15 Mohammed Elbtity , Abhishek Singh , Brendan Reidy , Xiaochen Guo , Ramtin Zand

Future optical quantum technologies, such as quantum networks, distributed quantum computing and sensing, demand efficient, broadband quantum memories. However, achieving high efficiency without introducing noise, reducing bandwidth, or…

Deploying Large Language Models (LLMs) efficiently on edge devices is often constrained by limited memory capacity and high power consumption. Low-bit quantization methods, particularly ternary quantization, have demonstrated significant…

Hardware Architecture · Computer Science 2025-05-02 Chenyang Yin , Zhenyu Bai , Pranav Venkatram , Shivam Aggarwal , Zhaoying Li , Tulika Mitra

Memristor crossbars are circuits capable of performing analog matrix-vector multiplications, overcoming the fundamental energy efficiency limitations of digital logic. They have been shown to be effective in special-purpose accelerators for…

Compute in-memory (CIM) is a promising technique that minimizes data transport, the primary performance bottleneck and energy cost of most data intensive applications. This has found wide-spread adoption in accelerating neural networks for…

Signal Processing · Electrical Eng. & Systems 2021-02-16 Brian Crafton , Samuel Spetalnick , Arijit Raychowdhury

Various processing-in-memory (PIM) accelerators based on various devices, micro-architectures, and interfaces have been proposed to accelerate deep neural networks (DNNs). How to deploy DNNs onto PIM-based accelerators is the key to explore…

Hardware Architecture · Computer Science 2024-11-15 Xiaotian Sun , Xinyu Wang , Wanqian Li , Yinhe Han , Xiaoming Chen

We present VitaLLM, a mixed precision accelerator that enables ternary weight large language models to run efficiently on edge devices. The design combines two compute cores, a multiplier free TINT core for ternary-INT projections and a…

Hardware Architecture · Computer Science 2026-05-04 Zi-Wei Lin , Tian-Sheuan Chang

Mass spectrometry (MS) is essential for proteomics and metabolomics but faces impending challenges in efficiently processing the vast volumes of data. This paper introduces SpecPCM, an in-memory computing (IMC) accelerator designed to…

Hardware Architecture · Computer Science 2024-11-18 Keming Fan , Ashkan Moradifirouzabadi , Xiangjin Wu , Zheyu Li , Flavio Ponzina , Anton Persson , Eric Pop , Tajana Rosing , Mingu Kang

The energy efficiency of analog computing-in-memory (ACIM) accelerator for recurrent neural networks, particularly long short-term memory (LSTM) network, is limited by the high proportion of nonlinear (NL) operations typically executed…

Hardware Architecture · Computer Science 2025-12-09 Junyi Yang , Xinyu Luo , Ye Ke , Zheng Wang , Hongyang Shang , Shuai Dong , Zhengnan Fu , Xiaofeng Yang , Hongjie Liu , Arindam Basu

Convolutional neural networks (CNN) have become a ubiquitous algorithm with growing applications in mobile and edge settings. We describe a compute-in-memory (CIM) technique called FPIRM using Racetrack Memory (RM) to accelerate CNNs for…

Emerging Technologies · Computer Science 2022-08-02 Sébastien Ollivier , Xinyi Zhang , Yue Tang , Chayanika Choudhuri , Jingtong Hu , Alex K. Jones
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