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Systolic Array (SA) architectures are well suited for accelerating matrix multiplications through the use of a pipelined array of Processing Elements (PEs) communicating with local connections and pre-orchestrated data movements. Even…

Hardware Architecture · Computer Science 2023-09-11 C. Peltekis , D. Filippas , G. Dimitrakopoulos , C. Nicopoulos

In Scientific Computing and modern Machine Learning (ML) workloads, sequences of dependent General Matrix Multiplications (GEMMs) often dominate execution time. While state-of-the-art BLAS libraries aggressively optimize individual GEMM…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-04-07 César Guedes Carneiro , Lucas Alvarenga , Guido Araujo , Sandro Rigo

Over the past few years, several microring resonator (MRR)-based analog photonic architectures have been proposed to accelerate general matrix-matrix multiplications (GEMMs), which are found in abundance in deep learning workloads.These…

Transformers have revolutionized deep learning with applications in natural language processing, computer vision, and beyond. However, their computational demands make it challenging to deploy them on low-power edge devices. This paper…

Hardware Architecture · Computer Science 2025-07-18 Rohit Prasad

In-memory computing (IMC) on a monolithic chip for deep learning faces dramatic challenges on area, yield, and on-chip interconnection cost due to the ever-increasing model sizes. 2.5D integration or chiplet-based architectures interconnect…

Machine Learning · Computer Science 2021-08-23 Gokul Krishnan , Sumit K. Mandal , Manvitha Pannala , Chaitali Chakrabarti , Jae-sun Seo , Umit Y. Ogras , Yu Cao

To enhance the efficiency of the attention mechanism within large language models (LLMs), previous works primarily compress the KV cache or group attention heads, while largely overlooking redundancy between layers. Our comprehensive…

Computation and Language · Computer Science 2025-10-20 Yongyu Mu , Yuzhang Wu , Yuchun Fan , Chenglong Wang , Hengyu Li , Jiali Zeng , Qiaozhi He , Murun Yang , Fandong Meng , Jie Zhou , Tong Xiao , Jingbo Zhu

The next significant step in the evolution and proliferation of artificial intelligence technology will be the integration of neural network (NN) models within embedded and mobile systems. This calls for the design of compact, energy…

Machine Learning · Computer Science 2020-02-05 Elham Azari , Sarma Vrudhula

FPGAs are a promising platform for accelerating Deep Learning (DL) applications, due to their high performance, low power consumption, and reconfigurability. Recently, the leading FPGA vendors have enhanced their architectures to more…

Hardware Architecture · Computer Science 2024-04-18 Endri Taka , Dimitrios Gourounas , Andreas Gerstlauer , Diana Marculescu , Aman Arora

Alignment of Large Language Models (LLMs) typically relies on Reinforcement Learning from Human Feedback (RLHF) with gradient-based optimizers such as Proximal Policy Optimization (PPO) or Group Relative Policy Optimization (GRPO). While…

Sequence alignment algorithms are a basic and critical component of many bioinformatics fields. With rapid development of sequencing technology, the fast growing reference database volumes and longer length of query sequence become new…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-01-09 Bo Xu , Changlong Li , Hang Zhuang , Jiali Wang , Qingfeng Wang , Jinhong Zhou , Xuehai Zhou

An increasing variety of AI accelerators is being considered for large-scale training. However, enabling large-scale training on early-life AI accelerators faces three core challenges: frequent system disruptions and undefined failure modes…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-16 Lei Qu , Lianhai Ren , Peng Cheng , Rui Gao , Ruizhe Wang , Tianyu Chen , Xiao Liu , Xingjian Zhang , Yeyun Gong , Yifan Xiong , Yucheng Ding , Yuting Jiang , Zhenghao Lin , Zhongxin Guo , Ziyue Yang

Systolic arrays are a promising computing concept which is in particular inline with CMOS technology trends and linear algebra operations found in the processing of artificial neural networks. The recent success of such deep learning…

Hardware Architecture · Computer Science 2020-06-26 Kevin Stehle , Günther Schindler , Holger Fröning

Modern central processing units (CPUs) feature single-instruction, multiple-data pipelines to accelerate compute-intensive floating-point and fixed-point workloads. Traditionally, these pipelines and corresponding instruction set…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-09-30 Stefan Remke , Alexander Breuer

Processing long contexts has become a critical capability for modern large language models (LLMs). However, serving long-context LLMs comes with significant inference costs due to the high memory overhead of the key-value (KV) cache.…

Machine Learning · Computer Science 2025-03-04 Qihui Zhou , Peiqi Yin , Pengfei Zuo , James Cheng

Low-Rank Adaptation (LoRA) is a widely adopted technique for parameter-efficient fine-tuning, but its slow convergence has spurred the development of numerous variants. Nevertheless, existing methods often fail to improve performance,…

Computation and Language · Computer Science 2025-12-15 Jiale Kang , Qingyu Yin

Increasing demands for computing power also propel the need for energy-efficient SoC accelerator architectures. One class for such accelerators are so-called processor arrays, which typically integrate a two-dimensional mesh of…

Hardware Architecture · Computer Science 2025-02-28 Dominik Walter , Marita Halm , Daniel Seidel , Indrayudh Ghosh , Christian Heidorn , Frank Hannig , Jürgen Teich

Modern hardware architectures for Convolutional Neural Networks (CNNs), other than targeting high performance, aim at dissipating limited energy. Reducing the data movement cost between the computing cores and the memory is a way to…

Hardware Architecture · Computer Science 2025-01-15 Cristian Sestito , Shady Agwa , Themis Prodromakis

Multi-stage ML inference pipelines are difficult to autoscale due to heterogeneous resources, cross-stage coupling, and dynamic bottleneck migration. We present SAIR, an autoscaling framework that uses an LLM as an in-context reinforcement…

Machine Learning · Computer Science 2026-02-02 Jianchang Su , Yifan Zhang , Shengkai Lin , Shizhen Zhao , Yusheng Zheng , Yiwei Yang , Wei Zhang

The current state of the art of Simultaneous Localisation and Mapping, or SLAM, on low power embedded systems is about sparse localisation and mapping with low resolution results in the name of efficiency. Meanwhile, research in this field…

Robotics · Computer Science 2019-02-14 Konstantinos Boikos , Christos-Savvas Bouganis

Sparse General Matrix-Matrix Multiplication (SpGEMM) is a fundamental operation in numerous scientific computing and data analytics applications, often bottlenecked by irregular memory access patterns. This paper presents Hash based…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-16 Shiju Li , Younghoon Min , Hane Yie , Hoshik Kim , Soohong Ahn , Joonseop Sim , Chul-Ho Lee , Jongryool Kim