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Although the matrix multiplication plays a vital role in computational linear algebra, there are few efficient solutions for matrix multiplication of the near-sparse matrices. The Sparse Approximate Matrix Multiply (SpAMM) is one of the…

Performance · Computer Science 2022-10-25 Xiaoyan Liu , Yi Liu , Ming Dun , Bohong Yin , Hailong Yang , Zhongzhi Luan , Depei Qian

Processing-in-memory (PIM) has shown extraordinary potential in accelerating neural networks. To evaluate the performance of PIM accelerators, we present an ISA-based simulation framework including a dedicated ISA targeting neural networks…

Hardware Architecture · Computer Science 2024-02-29 Xinyu Wang , Xiaotian Sun , Yinhe Han , Xiaoming Chen

Spiking Neural Networks (SNNs) have emerged as a biologically inspired alternative to conventional deep networks, offering event-driven and energy-efficient computation. However, their throughput remains constrained by the serial update of…

Neural and Evolutionary Computing · Computer Science 2026-03-16 Hongyang Shang , Shuai Dong , Yahan Yang , Junyi Yang , Peng Zhou , Arindam Basu

Herein, a bit-wise Convolutional Neural Network (CNN) in-memory accelerator is implemented using Spin-Orbit Torque Magnetic Random Access Memory (SOT-MRAM) computational sub-arrays. It utilizes a novel AND-Accumulation method capable of…

Machine Learning · Computer Science 2019-04-18 Arman Roohi , Shaahin Angizi , Deliang Fan , Ronald F DeMara

We develop a fused matrix multiplication kernel that unifies sampled dense-dense matrix multiplication and sparse-dense matrix multiplication under a single operation called FusedMM. By using user-defined functions, FusedMM can capture…

Machine Learning · Computer Science 2021-10-28 Md. Khaledur Rahman , Majedul Haque Sujon , Ariful Azad

Bit-serial architectures can handle Neural Networks (NNs) with different weight precisions, achieving higher resource efficiency compared with bit-parallel architectures. Besides, the weights contain abundant zero bits owing to the fault…

Hardware Architecture · Computer Science 2023-02-02 Wenhao Sun , Zhiwei Zou , Deng Liu , Wendi Sun , Song Chen , Yi Kang

The devices designed for the Internet-of-Things encompass a large variety of distinct processor architectures, forming a highly heterogeneous zoo. In order to tackle this, we employ a simulator to estimate the performance of the…

Hardware Architecture · Computer Science 2024-03-13 Cristian Ramírez , Adrián Castelló , Héctor Martínez , Enrique S. Quintana-Ortí

In-memory computing (IMC) with non-volatile memories (NVMs) has emerged as a promising approach to address the rapidly growing computational demands of Deep Neural Networks (DNNs). Mapping DNN layers spatially onto NVM-based IMC…

Hardware Architecture · Computer Science 2023-12-07 Abinand Nallathambi , Christin David Bose , Wilfried Haensch , Anand Raghunathan

Accelerators for sparse matrix multiplication are important components in emerging systems. In this paper, we study the main challenges of accelerating Sparse Matrix Multiplication (SpMM). For the situations that data is not stored in the…

Hardware Architecture · Computer Science 2019-06-04 Pareesa Ameneh Golnari , Sharad Malik

Number Theoretic Transform (NTT) is an essential mathematical tool for computing polynomial multiplication in promising lattice-based cryptography. However, costly division operations and complex data dependencies make efficient and…

Hardware Architecture · Computer Science 2023-04-25 Jingyao Zhang , Mohsen Imani , Elaheh Sadredini

In-DRAM Processing-In-Memory (DRAM-PIM) has emerged as a promising approach to accelerate memory-intensive workloads by mitigating data transfer overhead between DRAM and the host processor. Bit-serial DRAM-PIM architectures, further…

Hardware Architecture · Computer Science 2025-12-11 Siyuan Ma , Jiajun Hu , Jeeho Ryoo , Aman Arora , Lizy Kurian John

High Bandwidth Memory with Processing-in-Memory (HBM-PIM) offers an opportunity to reduce data movement by executing computation directly inside memory, but current commercial platforms expose limited instruction sets and require…

Hardware Architecture · Computer Science 2026-05-01 Emanuele Venieri , Simone Manoni , Alberto Florian , Jaehyun Park , Kyomin Sohn , Andrea Bartolini

Binary Neural Networks (BNNs) are increasingly preferred over full-precision Convolutional Neural Networks(CNNs) to reduce the memory and computational requirements of inference processing with minimal accuracy drop. BNNs convert CNN model…

Hardware Architecture · Computer Science 2023-03-21 Sairam Sri Vatsavai , Venkata Sai Praneeth Karempudi , Ishan Thakkar

State Space Models (SSMs) offer a promising alternative to transformers for long-sequence processing. However, their efficiency remains hindered by memory-bound operations, particularly in the prefill stage. While MARCA, a recent first…

Hardware Architecture · Computer Science 2026-04-10 Robin Geens , Arne Symons , Marian Verhelst

Large language model (LLM) inference has been a prevalent demand in daily life and industries. The large tensor sizes and computing complexities in LLMs have brought challenges to memory, computing, and databus. This paper proposes a…

Hardware Architecture · Computer Science 2025-09-19 Yimin Wang , Yue Jiet Chong , Xuanyao Fong

Bayesian Neural Networks (BNNs) provide superior estimates of uncertainty by generating an ensemble of predictive distributions. However, inference via ensembling is resource-intensive, requiring additional entropy sources to generate…

Emerging Technologies · Computer Science 2025-05-20 Prabodh Katti , Clement Ruah , Osvaldo Simeone , Bashir M. Al-Hashimi , Bipin Rajendran

Deep Convolutional Neural Networks (CNNs) have become state-of-the art for computer vision and other signal processing tasks due to their superior accuracy. In recent years, large efforts have been made to reduce the computational costs of…

Hardware Architecture · Computer Science 2021-04-13 Mario Fischer , Juergen Wassner

General Matrix Multiplication (GEMM) is a ubiquitous compute kernel in deep learning (DL). To support energy-efficient edge-native processing, new GEMM hardware units have been proposed that operate on unary encoded bitstreams using much…

Hardware Architecture · Computer Science 2024-12-25 Prabhu Vellaisamy , Harideep Nair , Joseph Finn , Manav Trivedi , Albert Chen , Anna Li , Tsung-Han Lin , Perry Wang , Shawn Blanton , John Paul Shen

Memristors are an emerging technology that enables artificial intelligence (AI) accelerators with high energy efficiency and radiation robustness -- properties that are vital for the deployment of AI on-board spacecraft. However, space…

Systems and Control · Electrical Eng. & Systems 2025-09-08 Zacharia A. Rudge , Dominik Dold , Moritz Fieback , Dario Izzo , Said Hamdioui

Compute-in-Memory (CIM) and weight sparsity are two effective techniques to reduce data movement during Neural Network (NN) inference. However, they can hardly be employed in the same accelerator simultaneously because CIM requires…

Hardware Architecture · Computer Science 2025-11-19 Weiping Yang , Shilin Zhou , Hui Xu , Yujiao Nie , Qimin Zhou , Zhiwei Li , Changlin Chen