English
Related papers

Related papers: Nemo: A Low-Write-Amplification Cache for Tiny Obj…

200 papers

Recommendation system has gained a large popularity for a variety of personalized suggestion tasks, but the ever-increasing number of user data makes real-time processing of recommendation systems difficult. NAND flash memory-based…

Hardware Architecture · Computer Science 2026-04-29 Jangho Baik , Sunghyun Kim , Gisan Ji , Wonbo Shim , Sungju Ryu

The standardization of NVMe Zoned Namespaces (ZNS) in the NVMe 2.0 specification presents a unique new addition to storage devices. Unlike traditional SSDs, where the flash media management idiosyncrasies are hidden behind a flash…

Operating Systems · Computer Science 2022-06-06 Nick Tehrany , Animesh Trivedi

Non-Orthogonal Multiple Access (NOMA) and caching are two proposed approaches to increase the capacity of future 5G wireless systems. Typically in NOMA systems, signals at the receiver are decoded using successive interference cancellation…

Information Theory · Computer Science 2018-01-24 Jose Armando Oviedo , Hamid R. Sadjadpour

This paper summarizes our work on experimentally analyzing, exploiting, and addressing vulnerabilities in multi-level cell NAND flash memory programming, which was published in the industrial session of HPCA 2017, and examines the work's…

Hardware Architecture · Computer Science 2018-05-10 Yu Cai , Saugata Ghose , Yixin Luo , Ken Mai , Onur Mutlu , Erich F. Haratsch

Caches in Content-Centric Networks (CCN) are increasingly adopting flash memory based storage. The current flash cache technology stores all files with the largest possible expiry date, i.e. the files are written in the memory so that they…

Networking and Internet Architecture · Computer Science 2016-06-24 Samta Shukla , Alhussein A. Abouzeid

3D NAND flash memory with advanced multi-level cell techniques provides high storage density, but suffers from significant performance degradation due to a large number of read-retry operations. Although the read-retry mechanism is…

Hardware Architecture · Computer Science 2021-03-15 Jisung Park , Myungsuk Kim , Myoungjun Chun , Lois Orosa , Jihong Kim , Onur Mutlu

Bulk bitwise operations, i.e., bitwise operations on large bit vectors, are prevalent in a wide range of important application domains, including databases, graph processing, genome analysis, cryptography, and hyper-dimensional computing.…

This work exploits the advantages of two prominent techniques in future communication networks, namely caching and non-orthogonal multiple access (NOMA). Particularly, a system with Rayleigh fading channels and cache-enabled users is…

Information Theory · Computer Science 2019-09-25 Khai Nguyen Doan , Mojtaba Vaezi , Wonjae Shin , H. Vincent Poor , Hyundong Shin , Tony Q. S. Quek

Flash memory-based processing-in-memory (flash-based PIM) offers high storage capacity and computational efficiency but faces significant reliability challenges due to noise in high-density multi-level cell (MLC) flash memories. Existing…

Information Theory · Computer Science 2025-06-24 Juyun Oh , Taewoo Park , Jiwoong Im , Yuval Cassuto , Yongjune Kim

The increased memory demands of workloads is putting high pressure on Last Level Caches (LLCs). Unfortunately, there is limited opportunity to increase the capacity of LLCs due to the area and power requirements of the underlying SRAM…

Hardware Architecture · Computer Science 2021-12-21 Apostolos Kokolis , Namrata Mantri , Shrikanth Ganapathy , Josep Torrellas , John Kalamatianos

Zoned Namespace SSDs (ZNS) are introduced recently to mitigate the block interface penalties of flash-based SSDs. It is a good opportunity for flash cache to address cache throughput and write amplification (WA) issues by fully controlling…

Performance · Computer Science 2024-10-16 Chongzhuo Yang , Chang Guo , Ming Zhao , Zhichao Cao

SSDs are currently replacing magnetic disks in many application areas. A challenge of the underlying flash technology is that data cannot be updated in-place. A block consisting of many pages must be completely erased before a single page…

Performance · Computer Science 2018-07-26 Lars Nagel , Tim Süß , Kevin Kremer , M. Umar Hameed , Lingfang Zeng , André Brinkmann

The increasing density of transistors in Integrated Circuits (ICs) has enabled the development of highly integrated Systems-on-Chip (SoCs) and, more recently, Multiprocessor Systems-on-Chip (MPSoCs). To address scalability challenges in…

Hardware Architecture · Computer Science 2025-04-29 Rodrigo Cataldo , Cesar Marcon , Debora Matos

NVMe SSD caching has demonstrated impressive capabilities in solving cloud block storage's I/O bottleneck and enhancing application performance in public, private, and hybrid cloud environments. However, traditional host-side caching…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-07-03 Qirui Yang , Runyu Jin , Ni Fan , Devasena Inupakutika , Bridget Davis , Ming Zhao

Large language models (LLMs) are central to modern natural language processing, delivering exceptional performance in various tasks. However, their substantial computational and memory requirements present challenges, especially for devices…

As SRAM-based caches are hitting a scaling wall, manufacturers are integrating DRAM-based caches into system designs to continue increasing cache sizes. While DRAM caches can improve the performance of memory systems, existing DRAM cache…

Large language models (LLMs) have demonstrated exceptional proficiency in understanding and generating human language, but efficient inference on resource-constrained embedded devices remains challenging due to large model sizes and…

Hardware Architecture · Computer Science 2025-07-15 Weihong Xu , Haein Choi , Po-kai Hsu , Shimeng Yu , Tajana Rosing

This paper introduces NVCache, an approach that uses a non-volatile main memory (NVMM) as a write cache to improve the write performance of legacy applications. We compare NVCache against file systems tailored for NVMM (Ext4-DAX and NOVA)…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-09-06 Rémi Dulong , Rafael Pires , Andreia Correia , Valerio Schiavoni , Pedro Ramalhete , Pascal Felber , Gaël Thomas

A low-power Content-Addressable-Memory (CAM) is introduced employing a new mechanism for associativity between the input tags and the corresponding address of the output data. The proposed architecture is based on a recently developed…

Hardware Architecture · Computer Science 2016-11-17 Hooman Jarollahi , Vincent Gripon , Naoya Onizawa , Warren J. Gross

The recent emergence of NVMe flash devices with Zoned Namespace support, ZNS SSDs, represents a significant new advancement in flash storage. ZNS SSDs introduce a new storage abstraction of append-only zones with a set of new I/O (i.e.,…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-10-31 Krijn Doekemeijer , Nick Tehrany , Balakrishnan Chandrasekaran , Matias Bjørling , Animesh Trivedi