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Large language models (LLMs) are becoming increasingly capable at small parameter scales. At the same time, conventional cloud-centric deployment introduces challenges around data privacy, latency, and cost that are acute in operational…

Hardware Architecture · Computer Science 2026-04-29 Harri Renney , Fouad Trad , Michael Mattarock , Zena Wood

The emergence of Phase-Change Memory (PCM) provides opportunities for directly connecting persistent memory to main memory bus. While PCM achieves high read throughput and low standby power, the critical concerns are its poor write…

Hardware Architecture · Computer Science 2020-07-28 Yinjin Fu

Aligning future system design with the ever-increasing compute needs of large language models (LLMs) is undoubtedly an important problem in today's world. Here, we propose a general performance modeling methodology and workload analysis of…

Hardware Architecture · Computer Science 2024-07-23 Joyjit Kundu , Wenzhe Guo , Ali BanaGozar , Udari De Alwis , Sourav Sengupta , Puneet Gupta , Arindam Mallik

Deep learning recommendation systems serve personalized content under diverse tail-latency targets and input-query loads. In order to do so, state-of-the-art recommendation models rely on terabyte-scale embedding tables to learn user…

Hardware Architecture · Computer Science 2023-02-22 Samuel Hsia , Udit Gupta , Bilge Acun , Newsha Ardalani , Pan Zhong , Gu-Yeon Wei , David Brooks , Carole-Jean Wu

Modern embedded and cyber-physical systems require every day more performance, power efficiency and flexibility, to execute several profiles and functionalities targeting the ever growing adaptivity needs and preserving execution…

Hardware Architecture · Computer Science 2021-03-08 Carlo Sau , Tiziana Fanni , Claudio Rubattu , Luigi Raffo , Francesca Palumbo

As quantum computers continue to improve and support larger, more complex computations, smart control hardware and compilers are needed to efficiently leverage the capabilities of these systems. This paper introduces a novel approach to…

Quantum Physics · Physics 2025-11-19 Folkert de Ronde , Alexander Knapen , Stephan Wong , Sebastian Feld

Memory load/store instructions consume an important part in execution time and energy consumption in domain-specific accelerators. For designing highly parallel systems, available parallelism at each granularity is extracted from the…

Hardware Architecture · Computer Science 2022-09-07 Khushal Sethi

Spiking neural networks excel at event-driven sensing. Yet, maintaining task-relevant context over long timescales both algorithmically and in hardware, while respecting both tight energy and memory budgets, remains a core challenge in the…

Neural and Evolutionary Computing · Computer Science 2026-05-05 Pengfei Sun , Zhe Su , Jascha Achterberg , Giacomo Indiveri , Dan F. M. Goodman , Danyal Akarca

Disaggregated memory is a promising approach that addresses the limitations of traditional memory architectures by enabling memory to be decoupled from compute nodes and shared across a data center. Cloud platforms have deployed such…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-06-21 Nan Ding , Pieter Maris , Hai Ah Nam , Taylor Groves , Muaaz Gul Awan , LeAnn Lindsey , Christopher Daley , Oguz Selvitopi , Leonid Oliker , Nicholas Wright , Samuel Williams

Large Language Models (LLMs) are powerful but incur high memory and computation costs. Quantization is an effective solution, with INT weights and FP activations being widely adopted to preserve accuracy. Prior works further reduce FP…

Hardware Architecture · Computer Science 2026-02-24 Xinyu Wang , Jieyu Li , Yanan Sun , Weifeng He

Hyperdimensional computing (HDC) is an emerging computing paradigm that represents, manipulates, and communicates data using very long random vectors (aka hypervectors). Among different hardware platforms capable of executing HDC…

Hardware Architecture · Computer Science 2022-05-24 Robert Guirado , Abbas Rahimi , Geethan Karunaratne , Eduard Alarcón , Abu Sebastian , Sergi Abadal

Mixed-precision neural network (MPNN) that utilizes just enough data width for the neural network processing is an effective approach to meet the stringent resources constraints including memory and computing of MCUs. Nevertheless, there is…

Hardware Architecture · Computer Science 2024-07-29 Junfeng Gong , Cheng Liu , Long Cheng , Huawei Li , Xiaowei Li

Recent advances in deep neural network demand more than millions of parameters to handle and mandate the high-performance computing resources with improved efficiency. The cross-bar array architecture has been considered as one of the…

Emerging Technologies · Computer Science 2020-08-24 Youngseok Kim , Seyoung Kim , Chun-chen Yeh , Vijay Narayanan , Jungwook Choi

Compute-In-Memory (CiM) is a promising solution to accelerate Deep Neural Networks (DNNs) as it can avoid energy-intensive DNN weight movement and use memory arrays to perform low-energy, high-density computations. These benefits have…

Hardware Architecture · Computer Science 2024-11-01 Tanner Andrulis , Joel S. Emer , Vivienne Sze

Multi-robot systems have been widely deployed in real-world applications, providing significant improvements in efficiency and reductions in labor costs. However, most existing multi-robot collaboration methods rely on extensive…

Robotics · Computer Science 2026-02-16 Baiqing Wang , Helei Cui , Bo Zhang , Xiaolong Zheng , Bin Guo , Zhiwen Yu

Mobile-edge computing (MEC) has emerged as a promising paradigm for enabling Internet of Things (IoT) devices to handle computation-intensive jobs. Due to the imperfect parallelization of algorithms for job processing on servers and the…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-06-17 Chuanchao Gao , Niraj Kumar , Arvind Easwaran

Deep Learning neural networks are pervasive, but traditional computer architectures are reaching the limits of being able to efficiently execute them for the large workloads of today. They are limited by the von Neumann bottleneck: the high…

Emerging Technologies · Computer Science 2022-06-22 Wilfried Haensch , Anand Raghunathan , Kaushik Roy , Bhaswar Chakrabarti , Charudatta M. Phatak , Cheng Wang , Supratik Guha

Both the training and use of Large Language Models (LLMs) require large amounts of energy. Their increasing popularity, therefore, raises critical concerns regarding the energy efficiency and sustainability of data centers that host them.…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-07-02 Grant Wilkins , Srinivasan Keshav , Richard Mortier

Deploying mixed-precision neural networks on edge devices is friendly to hardware resources and power consumption. To support fully mixed-precision neural network inference, it is necessary to design flexible hardware accelerators for…

Hardware Architecture · Computer Science 2025-02-04 Liang Zhao , Kunming Shao , Fengshi Tian , Tim Kwang-Ting Cheng , Chi-Ying Tsui , Yi Zou

While hardware-software co-design has significantly improved the efficiency of neural network inference, modeling the training phase remains a critical yet underexplored challenge. Training workloads impose distinct constraints,…

Machine Learning · Computer Science 2026-03-17 Jérémy Morlier , Robin Geens , Stef Cuyckens , Arne Symons , Marian Verhelst , Vincent Gripon , Mathieu Léonardon
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