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This paper introduces a computer architecture, where part of the instruction set architecture (ISA) is implemented on small highly-integrated field-programmable gate arrays (FPGAs). Small FPGAs inside a general-purpose processor (CPU) can…

Hardware Architecture · Computer Science 2022-08-23 Philippos Papaphilippou , Myrtle Shah

Reconfigurable computing refers to the use of processors, such as Field Programmable Gate Arrays (FPGAs), that can be modified at the hardware level to take on different processing tasks. A reconfigurable computing platform describes the…

Hardware Architecture · Computer Science 2007-05-23 Darran Nathan , Kelvin Lim Mun Kit , Kelly Choo Hon Min , Philip Wong Jit Chin , Andreas Weisensee

This paper presents a novel, non-standard set of vector instruction types for exploring custom SIMD instructions in a softcore. The new types allow simultaneous access to a relatively high number of operands, reducing the instruction count…

Hardware Architecture · Computer Science 2021-06-15 Philippos Papaphilippou , Paul H. J. Kelly , Wayne Luk

High Performance Computing (HPC) platforms allow scientists to model computationally intensive algorithms. HPC clusters increasingly use General-Purpose Graphics Processing Units (GPGPUs) as accelerators; FPGAs provide an attractive…

Hardware Architecture · Computer Science 2015-04-20 Syed Waqar Nabi , Saji N. Hameed , Wim Vanderbauwhede

Field Programmable Gate Arrays (FPGAs) have recently been increasingly used for highly-parallel processing of compute intensive tasks. This paper introduces an FPGA hardware platform architecture that is PC-based, allows for fast…

Hardware Architecture · Computer Science 2007-05-23 Andreas Weisensee , Darran Nathan

FPGAs are an attractive type of accelerator for all-purpose HPC computing systems due to the possibility of deploying tailored hardware on demand. However, the common tools for programming and operating FPGAs are still complex to use,…

Hardware Architecture · Computer Science 2022-09-12 Gabriel Rodriguez-Canal , Nick Brown , Yuri Torres , Arturo Gonzalez-Escribano

We proposes a platform which can generate hardware/software description based on flexible in-struction set architectures (ISAs). The platform takes advantage of the flexibility of field pro-grammable gate array (FPGA) to design many micro…

Logic in Computer Science · Computer Science 2021-05-27 Shih-Yi Yuan , Bo-Yu Zhu

FPGAs are an attractive type of accelerator for all-purpose HPC computing systems due to the possibility of deploying tailored hardware on demand. However, the common tools for programming and operating FPGAs are still complex to use,…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-01-19 Gabriel Rodriguez-Canal , Nick Brown , Yuri Torres , Arturo Gonzalez-Escribano

The growing capacity of integration allows to instantiate hundreds of soft-core processors in a single FPGA to create a reconfigurable multiprocessing system. Lately, FPGAs have been proven to give a higher energy efficiency than…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-05-03 David Castells-Rufas , Albert Saa-Garriga , Jordi Carrabina

In order to make full use of heterogeneous hardware, it is necessary to have a technical skill of hardware such as OpenCL, and the current situation is that the barrier is high. Based on this background, I have proposed environment-adaptive…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-11-01 Yoji Yamato

Field Programmable Gate Array (FPGA) is widely used in acceleration of deep learning applications because of its reconfigurability, flexibility, and fast time-to-market. However, conventional FPGA suffers from the tradeoff between chip area…

Based on the two observations that diverse applications perform better on different multicore architectures, and that different phases of an application may have vastly different resource requirements, Pal et al. proposed a novel…

Programming Languages · Computer Science 2016-06-21 Sanjiva Prasad

The use of reconfigurable computing, and FPGAs in particular, to accelerate computational kernels has the potential to be of great benefit to scientific codes and the HPC community in general. However, whilst recent advanced in FPGA tooling…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-10-06 Nick Brown , David Dolman

AI acceleration has been dominated by GPUs, but the growing need for lower latency, energy efficiency, and fine-grained hardware control exposes the limits of fixed architectures. In this context, Field-Programmable Gate Arrays (FPGAs)…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-11-18 Arturo Urías Jiménez

Field-programmable gate arrays (FPGAs) are widely used to implement deep learning inference. Standard deep neural network inference involves the computation of interleaved linear maps and nonlinear activation functions. Prior work for…

Machine Learning · Computer Science 2024-02-12 Marta Andronic , George A. Constantinides

Domain-specialized FPGAs have delivered unprecedented performance for low-latency inference across scientific and industrial workloads, yet nearly all existing accelerators assume static models trained offline, relegating learning and…

Hardware Architecture · Computer Science 2026-02-03 Duc Hoang

Building and maintaining a silicon foundry is a costly endeavor that requires substantial financial investment. From this scenario, the semiconductor business has largely shifted to a fabless model where the Integrated Circuit supply chain…

Cryptography and Security · Computer Science 2023-05-26 Zain Ul Abideen , Sumathi Gokulanathan , Muayad J. Aljafar , Samuel Pagliarini

With the emerging big data applications of Machine Learning, Speech Recognition, Artificial Intelligence, and DNA Sequencing in recent years, computer architecture research communities are facing the explosive scale of various data…

Hardware Architecture · Computer Science 2017-12-14 Chao Wang , Wenqi Lou , Lei Gong , Lihui Jin , Luchao Tan , Yahui Hu , Xi Li , Xuehai Zhou

We present a customizable soft architecture which allows for the execution of GPGPU code on an FPGA without the need to recompile the design. Issues related to scaling the overlay architecture to multiple GPGPU multiprocessors are…

Hardware Architecture · Computer Science 2016-06-22 Kevin Andryc , Tedy Thomas , Russell Tessier

In this treatise, my research on methods to improve efficiency, reliability, and security of reconfigurable hardware systems, i.e., FPGAs, through partial dynamic reconfiguration is outlined. The efficiency of reconfigurable systems can be…

Hardware Architecture · Computer Science 2018-10-01 Daniel Ziener
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