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Related papers: Interconnect-Aware Logic Resynthesis for Multi-Die…

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Aggressively quantized large language models (LLMs), such as BitNet-style 1.58-bit Transformers with ternary weights, make it feasible to deploy generative AI on low-power edge FPGAs. However, as prompts grow to tens of thousands of tokens,…

Hardware Architecture · Computer Science 2025-12-15 Yifan Zhang , Zhiheng Chen , Ye Qiao , Sitao Huang

Approximate computing is an attractive paradigm for reducing the design complexity of error-resilient systems, therefore improving performance and saving power consumption. In this work, we propose a new two-level approximate logic…

Other Computer Science · Computer Science 2022-01-25 Gabriel Ammes , Walter Lau Neto , Paulo Butzen , Pierre-Emmanuel Gaillardon , Renato P. Ribas

Nowadays, shallow and deep Neural Networks (NNs) have vast applications including biomedical engineering, image processing, computer vision, and speech recognition. Many researchers have developed hardware accelerators including…

Hardware Architecture · Computer Science 2021-05-18 Amir-Hossein Kiamarzi , Pezhman Torabi , Reza Sameni

FPGAs are increasingly adopted in datacenter environments for their reconfigurability and energy efficiency. High-Level Synthesis (HLS) tools have eased FPGA programming by raising the abstraction level from RTL to untimed C/C++, yet…

Machine Learning · Computer Science 2025-05-01 Neha Prakriya , Zijian Ding , Yizhou Sun , Jason Cong

In today's rapidly evolving field of electronic design automation (EDA), the complexity of hardware designs is increasing, necessitating more sophisticated automation solutions. High-level synthesis (HLS), as a pivotal solution, automates…

Programming Languages · Computer Science 2025-08-06 M Zafir Sadik Khan , Nowfel Mashnoor , Mohammad Akyash , Kimia Azar , Hadi Kamali

High-level synthesis (HLS) enables designers to customize hardware designs efficiently. However, it is still challenging to foresee the correlation between power consumption and HLS-based applications at an early design stage. To overcome…

Hardware Architecture · Computer Science 2020-09-03 Zhe Lin , Jieru Zhao , Sharad Sinha , Wei Zhang

Optimizing Register Transfer Level (RTL) code is crucial for improving the power, performance, and area (PPA) of digital circuits in the early stages of synthesis. Manual rewriting, guided by synthesis feedback, can yield high-quality…

Hardware Architecture · Computer Science 2025-09-23 Yiting Wang , Wanghao Ye , Ping Guo , Yexiao He , Ziyao Wang , Bowei Tian , Shwai He , Guoheng Sun , Zheyu Shen , Sihan Chen , Ankur Srivastava , Qingfu Zhang , Gang Qu , Ang Li

The quality of inverse problem solutions obtained through deep learning [Barbastathis et al, 2019] is limited by the nature of the priors learned from examples presented during the training phase. In the case of quantitative phase retrieval…

Image and Video Processing · Electrical Eng. & Systems 2019-07-30 Mo Deng , Shuai Li , Alexandre Goy , Iksung Kang , George Barbastathis

Recently, large language models (LLMs) have achieved huge success in the natural language processing (NLP) field, driving a growing demand to extend their deployment from the cloud to edge devices. However, deploying LLMs on…

Hardware Architecture · Computer Science 2025-05-08 Yanbiao Liang , Huihong Shi , Haikuo Shao , Zhongfeng Wang

Residual neural networks are widely used in computer vision tasks. They enable the construction of deeper and more accurate models by mitigating the vanishing gradient problem. Their main innovation is the residual block which allows the…

Hardware Architecture · Computer Science 2023-11-03 Filippo Minnella , Teodoro Urso , Mihai T. Lazarescu , Luciano Lavagno

Deep learning (DL) is becoming the cornerstone of numerous applications both in datacenters and at the edge. Specialized hardware is often necessary to meet the performance requirements of state-of-the-art DL models, but the rapid pace of…

Hardware Architecture · Computer Science 2025-12-16 Andrew Boutros , Aman Arora , Vaughn Betz

FPGA (Field-Programmable Gate Array) logic synthesis tools are key components in the EDA (Electronic Design Automation) toolchain. They convert hardware designs written in description languages such as Verilog into gate-level…

Software Engineering · Computer Science 2025-08-22 Yi Zhang , He Jiang , Xiaochen Li , Shikai Guo , Peiyu Zou , Zun Wang

Field-Programmable Gate Arrays (FPGAs) play an indispensable role in Electronic Design Automation (EDA), translating Register-Transfer Level (RTL) designs into gate-level netlists. The correctness and reliability of FPGA logic synthesis…

Software Engineering · Computer Science 2025-09-03 Hui Zeng , Zhihao Xu , Hui Li , Siwen Wang , Qian Ma

Logic synthesis plays a crucial role in the digital design flow. It has a decisive influence on the final Quality of Results (QoR) of the circuit implementations. However, existing multi-level logic optimization algorithms often employ…

Hardware Architecture · Computer Science 2024-04-02 Chen Chen , Guangyu Hu , Dongsheng Zuo , Cunxi Yu , Yuzhe Ma , Hongce Zhang

Recent efforts for improving the performance of neural network (NN) accelerators that meet today's application requirements have given rise to a new trend of logic-based NN inference relying on fixed function combinational logic. Mapping…

Hardware Architecture · Computer Science 2022-08-02 Soheil Nazar Shahsavani , Arash Fayyazi , Mahdi Nazemi , Massoud Pedram

To improve the efficiency of distributed large language model (LLM) inference, various parallelization strategies, such as tensor and pipeline parallelism, have been proposed. However, the distinct computational characteristics inherent in…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-03-11 Qidong Su , Wei Zhao , Xin Li , Muralidhar Andoorveedu , Chenhao Jiang , Zhanda Zhu , Kevin Song , Christina Giannoula , Gennady Pekhimenko

Transformer-based Large Language Models (LLMs) have made a significant impact on various domains. However, LLMs' efficiency suffers from both heavy computation and memory overheads. Compression techniques like sparsification and…

Recurrent neural networks (RNNs), particularly LSTMs, are effective for time-series tasks like sentiment analysis and short-term stock prediction. However, their computational complexity poses challenges for real-time deployment in resource…

Machine Learning · Computer Science 2025-06-27 Shashwat Khandelwal , Jakoba Petri-Koenig , Thomas B. Preußer , Michaela Blott , Shreejith Shanker

Large Language Models (LLMs) achieve strong performance across diverse tasks but face deployment challenges due to their massive size. Structured pruning offers acceleration benefits but leads to significant performance degradation. Recent…

Machine Learning · Computer Science 2026-02-03 Meng Li , Peisong Wang , Yuantian Shao , Qinghao Hu , Hongjian Fang , Yifan Zhang , Zhihui Wei , Jian Cheng

Machine Learning (ML) has been widely adopted in design exploration using high level synthesis (HLS) to give a better and faster performance, and resource and power estimation at very early stages for FPGA-based design. To perform…

Hardware Architecture · Computer Science 2023-08-22 Zhigang Wei , Aman Arora , Ruihao Li , Lizy K. John