Related papers: Energy-Efficient p-Bit-Based Fully-Connected Quant…
In this dissertation, we explore how quantum annealing (QA) and its applications behave in an open system setting. We give derivations and numerical recipes for effective parallel simulation methods for time-dependent open dynamics of…
Recently, a Hamiltonian dynamics simulation was performed on a kicked ferromagnetic 2D transverse field Ising model with a connectivity graph native to the 127 qubit heavy-hex IBM Quantum architecture using ZNE quantum error mitigation. We…
We investigate the minimum edge multiway cut problem, a fundamental task in evaluating the resilience of telecommunication networks. This study benchmarks the problem across three quantum computing paradigms: quantum annealing on a D-Wave…
Spiking Neural Networks (SNNs) are promising biologically plausible models of computation which utilize a spiking binary activation function similar to that of biological neurons. SNNs are well positioned to process spatiotemporal data, and…
Neutral atom arrays have become a promising platform for quantum computing, especially the field programmable qubit array (FPQA) endowed with the unique capability of atom movement. This feature allows dynamic alterations in qubit…
Energy efficient routing in wireless sensor networks has attracted attention from researchers in both academia and industry, most recently motivated by the opportunity to use SDN (software defined network)-inspired approaches. These…
We propose and analyze the use of Bayesian optimization techniques to design quantum annealing schedules with minimal user and resource requirements. We showcase our scheme with results for two paradigmatic spin models. We find that…
Quantum annealing is a method developed to solve combinatorial optimization problems by utilizing quantum bits. Solving such problems corresponds to minimizing a cost function defined over binary variables. However, in many practical cases,…
Minor embedding heuristics have become an indispensable tool for compiling problems in quadratically unconstrained binary optimization (QUBO) into the hardware graphs of quantum and CMOS annealing processors. While recent embedding…
Quantum annealing (QA) is a method for solving combinatorial optimization problems. We can estimate the computational time for QA using the adiabatic condition. The adiabatic condition consists of two parts: an energy gap and a transition…
Quantum emulators play an important role in the development and testing of quantum algorithms, especially given the limitations of the current FTQC era. Developing high-speed, memory-optimized quantum emulators is a growing research trend,…
Mainstream machine-learning techniques such as deep learning and probabilistic programming rely heavily on sampling from generally intractable probability distributions. There is increasing interest in the potential advantages of using…
Region proposal is critical for object detection while it usually poses a bottleneck in improving the computation efficiency on traditional control-flow architectures. We have observed region proposal tasks are potentially suitable for…
Variational quantum algorithms (VQAs) are promising methods to demonstrate quantum advantage on near-term devices as the required resources are divided between a quantum simulator and a classical optimizer. As such, designing a VQA which is…
This paper presents and demonstrates a stochastic logic time delay reservoir design in FPGA hardware. The reservoir network approach is analyzed using a number of metrics, such as kernel quality, generalization rank, performance on simple…
FPGA-based hardware accelerators have received increasing attention mainly due to their ability to accelerate deep pipelined applications, thus resulting in higher computational performance and energy efficiency. Nevertheless, the amount of…
Researchers and industries are increasingly drawn to quantum computing for its computational potential. However, validating new quantum algorithms is challenging due to the limitations of current quantum devices. Software simulators are…
The configurable building blocks of current FPGAs -- Logic blocks (LBs), Digital Signal Processing (DSP) slices, and Block RAMs (BRAMs) -- make them efficient hardware accelerators for the rapid-changing world of Deep Learning (DL).…
Directed acyclic graphs or Bayesian networks that are popular in many AI related sectors for probabilistic inference and causal reasoning can be mapped to probabilistic circuits built out of probabilistic bits (p-bits), analogous to binary…
Spiking neural networks (SNNs) are a promising paradigm for energy-efficient event-driven computation, but large-scale SNN execution remains challenging because sparse spike communication and synchronization can dominate runtime. Existing…