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Related papers: Athena: Synergizing Data Prefetching and Off-Chip …

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Past research has proposed numerous hardware prefetching techniques, most of which rely on exploiting one specific type of program context information (e.g., program counter, cacheline address) to predict future memory accesses. These…

Hardware Architecture · Computer Science 2023-04-07 Rahul Bera , Konstantinos Kanellopoulos , Anant V. Nori , Taha Shahroodi , Sreenivas Subramoney , Onur Mutlu

Recently, large language models (LLMs) like ChatGPT, LLaMA, and Claude have prevailed in countless domains, including legal scenarios. With LLMs' rapid technological progress, the development of prompt engineering (PE) as an interface…

Computation and Language · Computer Science 2024-10-16 Xiao Peng , Liang Chen

Long-latency load requests continue to limit the performance of high-performance processors. To increase the latency tolerance of a processor, architects have primarily relied on two key techniques: sophisticated data prefetchers and large…

Hardware Architecture · Computer Science 2022-10-03 Rahul Bera , Konstantinos Kanellopoulos , Shankar Balachandran , David Novo , Ataberk Olgun , Mohammad Sadrosadati , Onur Mutlu

Emerging applications, such as big data analytics and machine learning, require increasingly large amounts of main memory, often exceeding the capacity of current commodity processors built on DRAM technology. To address this, recent…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-10-27 Manel Lurbe , Miguel Avargues , Salvador Petit , Maria E. Gomez , Rui Yang , Guanhao Wang , Julio Sahuquillo

We present Athena-PRM, a multimodal process reward model (PRM) designed to evaluate the reward score for each step in solving complex reasoning problems. Developing high-performance PRMs typically demands significant time and financial…

Machine Learning · Computer Science 2026-05-27 Shuai Wang , Zhenhua Liu , Jiaheng Wei , Xuanwu Yin , Dong Li , Emad Barsoum

Bridging the gap between theoretical conceptualization and computational implementation is a major bottleneck in Scientific Computing (SciC) and Scientific Machine Learning (SciML). We introduce ATHENA (Agentic Team for Hierarchical…

Machine Learning · Computer Science 2026-05-11 Juan Diego Toscano , Daniel T. Chen , George Em Karniadakis

High load latency that results from deep cache hierarchies and relatively slow main memory is an important limiter of single-thread performance. Data prefetch helps reduce this latency by fetching data up the hierarchy before it is…

Hardware Architecture · Computer Science 2021-03-30 Majid Jalili , Mattan Erez

Cache prefetcher greatly eliminates compulsory cache misses, by fetching data from slower memory to faster cache before it is actually required by processors. Sophisticated prefetchers predict next use cache line by repeating program's…

Hardware Architecture · Computer Science 2017-12-05 Haoyuan Wang , Zhiwei Luo

Hardware prefetching is critical to fill the performance gap between CPU speeds and slower memory accesses. With multicore architectures becoming commonplace, traditional prefetchers are severely challenged. Independent core operation…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-09-16 Mohammed Humaid Siddiqui , Fernando Guzman , Yufei Wu , Ruishu Ann

Data Prefetching is a technique that can hide memory latency by fetching data before it is needed by a program. Prefetching relies on accurate memory access prediction, to which task machine learning based methods are increasingly applied.…

Hardware Architecture · Computer Science 2022-05-31 Pengmiao Zhang , Ajitesh Srivastava , Anant V. Nori , Rajgopal Kannan , Viktor K. Prasanna

Given the extremely high output rate foreseen at LHC and the general-purpose nature of ATLAS experiment, an efficient and flexible way to select events in the High Level Trigger is needed. An extremely flexible solution is proposed that…

High Energy Physics - Experiment · Physics 2014-11-17 G. Comune , A. Corso-Radu , M. Elsing , M. Grothe , T. Schoerner-Sadenius , D. Wicke , S. George , A. Lowe , T. Shears , J. T. Baines , S. Gonzalez

Vision-Language Navigation (VLN) policies trained on offline datasets often exhibit degraded task performance when deployed in unfamiliar navigation environments at test time, where agents are typically evaluated without access to external…

Robotics · Computer Science 2025-06-10 Heeju Ko , Sungjune Kim , Gyeongrok Oh , Jeongyoon Yoon , Honglak Lee , Sujin Jang , Seungryong Kim , Sangpil Kim

Due to emergent capabilities, large language models (LLMs) have been utilized as language-based agents to perform a variety of tasks and make decisions with an increasing degree of autonomy. These autonomous agents can understand high-level…

Computation and Language · Computer Science 2024-08-21 Tanmana Sadhu , Ali Pesaranghader , Yanan Chen , Dong Hoon Yi

Attention mechanisms underpin the success of large language models (LLMs), yet their substantial computational and memory overhead poses challenges for optimizing efficiency and performance. A critical bottleneck arises as KV cache and…

Computation and Language · Computer Science 2025-07-24 Luoyang Sun , Cheng Deng , Jiwen Jiang , Xinjian Wu , Haifeng Zhang , Lei Chen , Lionel Ni , Jun Wang

Data prefetching, i.e., the act of predicting application's future memory accesses and fetching those that are not in the on-chip caches, is a well-known and widely-used approach to hide the long latency of memory accesses. The fruitfulness…

Hardware Architecture · Computer Science 2020-09-03 Mohammad Bakhshalipour , Mehran Shakerinava , Fatemeh Golshan , Ali Ansari , Pejman Lotfi-Karman , Hamid Sarbazi-Azad

Hardware prefetching plays a critical role in hiding the off-chip DRAM latency. The complexity of applications results in a wide variety of memory access patterns, prompting the development of numerous cache-prefetching algorithms.…

Hardware Architecture · Computer Science 2025-03-26 Mengming Li , Qijun Zhang , Yongqing Ren , Zhiyao Xie

Recent approaches for learning policies to improve caching, target just one out of the prefetching, admission and eviction processes. In contrast, we propose an end to end pipeline to learn all three policies using machine learning. We also…

Operating Systems · Computer Science 2020-09-22 Ayush Mangal , Jitesh Jain , Keerat Kaur Guliani , Omkar Bhalerao

Text-to-image diffusion models achieve high visual fidelity but surprisingly exhibit systematic failures in numerical control when prompts specify explicit object counts. To address this limitation, we introduce ATHENA, a model-agnostic,…

Computer Vision and Pattern Recognition · Computer Science 2026-03-23 Mohammad Shahab Sepehri , Asal Mehradfar , Berk Tinaz , Salman Avestimehr , Mahdi Soltanolkotabi

To alleviate the performance and energy overheads of contemporary applications with large data footprints, we propose the Two Level Perceptron (TLP) predictor, a neural mechanism that effectively combines predicting whether an access will…

Hardware Architecture · Computer Science 2025-11-04 Alexandre Valentin Jamet , Georgios Vavouliotis , Daniel A. Jiménez , Lluc Alvarez , Marc Casas

LLMs now form the backbone of AI agents across a diverse range of applications, including tool use, command-line interfaces, and web or computer interaction. These agentic LLM inference tasks are fundamentally different from chatbot-focused…

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