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Transformers, driven by attention mechanisms, form the foundation of large language models (LLMs). As these models scale up, efficient GPU attention kernels become essential for high-throughput and low-latency inference. Diverse LLM…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-04-23 Zihao Ye , Lequn Chen , Ruihang Lai , Wuwei Lin , Yineng Zhang , Stephanie Wang , Tianqi Chen , Baris Kasikci , Vinod Grover , Arvind Krishnamurthy , Luis Ceze

The demand for efficient large language model (LLM) inference has propelled the development of dedicated accelerators. As accelerators are vulnerable to hardware faults due to aging, variation, etc, existing accelerator designs often…

Hardware Architecture · Computer Science 2025-04-08 Tong Xie , Jiawang Zhao , Zishen Wan , Zuodong Zhang , Yuan Wang , Runsheng Wang , Ru Huang , Meng Li

Recently, there has been an extensive research effort in building efficient large language model (LLM) inference serving systems. These efforts not only include innovations in the algorithm and software domains but also constitute…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-12-02 Jaehong Cho , Minsu Kim , Hyunmin Choi , Guseul Heo , Jongse Park

It is well known that many types of artificial neural networks, including recurrent networks, can achieve a high classification accuracy even with low-precision weights and activations. The reduction in precision generally yields much more…

Computer Vision and Pattern Recognition · Computer Science 2018-07-13 Vladimir Rybalkin , Alessandro Pappalardo , Muhammad Mohsin Ghaffar , Giulio Gambardella , Norbert Wehn , Michaela Blott

Deploying large language models (LLMs) on edge platforms is challenged by their high computational and memory demands. Although recent low-bit quantization methods (e.g., BitNet, DeepSeek) compress weights to as little as 1.58 bits with…

Hardware Architecture · Computer Science 2025-04-28 Ye Qiao , Zhiheng Chen , Yifan Zhang , Yian Wang , Sitao Huang

Recent breakthroughs in solving reasoning, math and coding problems with Large Language Models (LLMs) have been enabled by investing substantial computation budgets at inference time. Therefore, inference speed is one of the most critical…

Long-context Large Language Model (LLM) inference faces increasing compute bottlenecks as attention calculations scale with context length, primarily due to the growing KV-cache transfer overhead that saturates High Bandwidth Memory (HBM).…

Hardware Architecture · Computer Science 2025-08-13 Ming-Yen Lee , Faaiq Waqar , Hanchen Yang , Muhammed Ahosan Ul Karim , Harsono Simka , Shimeng Yu

Specializing large language models (LLMs) for local deployment in domain-specific use cases is necessary for strong performance while meeting latency and privacy constraints. However, conventional task-specific adaptation approaches do not…

Machine Learning · Computer Science 2024-12-20 Lanxiang Hu , Tajana Rosing , Hao Zhang

Inference accounts for the majority of latency and energy consumption in large language model (LLM) deployments, often exceeding 90% of total cost. While training-time efficiency has seen extensive progress, runtime optimization remains a…

Large language models (LLMs) have catalyzed an upsurge in automatic code generation, garnering significant attention for register transfer level (RTL) code generation. Despite the potential of RTL code generation with natural language, it…

Hardware Architecture · Computer Science 2024-08-14 Chenwei Xiong , Cheng Liu , Huawei Li , Xiaowei Li

High-Level Synthesis (HLS) is increasingly popular for hardware design using C/C++ instead of Register-Transfer Level (RTL). To express concurrent hardware behavior in a sequential language like C/C++, HLS tools introduce constructs such as…

Hardware Architecture · Computer Science 2025-08-28 Rishov Sarkar , Cong Hao

In last two years, large language models (LLMs) have shown strong capabilities in code generation, including hardware design at register-transfer level (RTL). While their use in high-level synthesis (HLS) remains comparatively less mature,…

Hardware Architecture · Computer Science 2026-01-29 M Zafir Sadik Khan , Kimia Azar , Hadi Kamali

Deploying large language models (LLMs) on embedded devices remains a significant research challenge due to the high computational and memory demands of LLMs and the limited hardware resources available in such environments. While embedded…

Hardware Architecture · Computer Science 2025-10-20 Jindong Li , Tenglong Li , Ruiqi Chen , Guobin Shen , Dongcheng Zhao , Qian Zhang , Yi Zeng

Large language models (LLMs) are central to modern natural language processing, delivering exceptional performance in various tasks. However, their substantial computational and memory requirements present challenges, especially for devices…

The extremely high computational and storage demands of large language models have excluded most edge devices, which were widely used for efficient machine learning, from being viable options. A typical edge device usually only has 4GB of…

Hardware Architecture · Computer Science 2025-02-18 Jindong Li , Tenglong Li , Guobin Shen , Dongcheng Zhao , Qian Zhang , Yi Zeng

High-Level Synthesis allows hardware designers to create complex RTL designs using C/C++. The traditional HLS workflow involves iterations of C/C++ simulation for partial functional verification and HLS synthesis for coarse timing…

Performance · Computer Science 2023-04-25 Rishov Sarkar , Cong Hao

Transformer-based large language models (LLMs) rely heavily on intensive matrix multiplications for attention and feed-forward layers, with the Q, K, and V linear projections in the Multi-Head Self-Attention (MHA) module constituting a…

Hardware Architecture · Computer Science 2025-05-22 Richie Li , Sicheng Chen

The increasing demand of dedicated accelerators to improve energy efficiency and performance has highlighted FPGAs as a promising option to deliver both. However, programming FPGAs in hardware description languages requires long time and…

Hardware Architecture · Computer Science 2020-03-31 Maria A. Dávila-Guzmán , Rubén Gran Tejero , María Villarroya-Gaudó , Darío Suárez Gracia

Dynamic programming (DP) based algorithms are essential yet compute-intensive parts of numerous bioinformatics pipelines, which typically involve populating a 2-D scoring matrix based on a recursive formula, optionally followed by a…

Hardware Architecture · Computer Science 2024-11-07 Yingqi Cao , Anshu Gupta , Jason Liang , Yatish Turakhia

Large Language Models (LLMs) demand substantial computational resources, resulting in high energy consumption on GPUs. To address this challenge, we focus on Coarse-Grained Reconfigurable Arrays (CGRAs) as an effective alternative that…

Hardware Architecture · Computer Science 2025-12-02 Takuto Ando , Yu Eto , Ayumu Takeuchi , Yasuhiko Nakashima