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Basic Linear Algebra Subprograms (BLAS) play key role in high performance and scientific computing applications. Experimentally, yesteryear multicore and General Purpose Graphics Processing Units (GPGPUs) are capable of achieving up to 15…

Hardware Architecture · Computer Science 2016-11-29 Farhad Merchant , Tarun Vatwani , Anupam Chattopadhyay , Soumyendu Raha , S K Nandy , Ranjani Narayan

Specialized hardware accelerators are becoming important for more and more applications. Thanks to specialization, they can achieve high performance and energy efficiency but their design is complex and time consuming. This problem is…

Hardware Architecture · Computer Science 2021-04-06 Stephanie Soldavini , Christian Pilato

The generic matrix multiply (GEMM) function is the core element of high-performance linear algebra libraries used in many computationally-demanding digital signal processing (DSP) systems. We propose an acceleration technique for GEMM based…

Mathematical Software · Computer Science 2015-05-30 Davide Anastasia , Yiannis Andreopoulos

General matrix-matrix multiplication (GEMM) is a fundamental operation in machine learning (ML) applications. We present the first comprehensive performance acceleration of GEMM workloads on AMD's second-generation AIE-ML (AIE2)…

Hardware Architecture · Computer Science 2025-09-01 Kaustubh Mhatre , Endri Taka , Aman Arora

Advances in life sciences over the last few decades have lead to the generation of a huge amount of biological data. Computing research has become a vital part in driving biological discovery where analysis and categorization of biological…

Computational Engineering, Finance, and Science · Computer Science 2014-03-31 S. M. Vidanagamachchi , S. D. Dewasurendra , R. G. Ragel , M. Niranjan

Deep neural networks (DNNs) face significant challenges when deployed on resource-constrained extreme edge devices due to their computational and data-intensive nature. While standalone accelerators tailored for specific application…

Hardware Architecture · Computer Science 2024-11-22 Xiaoling Yi , Ryan Antonio , Joren Dumoulin , Jiacong Sun , Josse Van Delm , Guilherme Paim , Marian Verhelst

There has been significant research interest in Procedural Level Generation via Machine Learning (PLGML), applying ML techniques to automated level generation. One recent trend is in the direction of learning representations for level…

Machine Learning · Computer Science 2022-10-25 Mrunal Jadhav , Matthew Guzdial

The incorporation of high-performance optoelectronic devices into photonic neuromorphic processors can substantially accelerate computationally intensive operations in machine learning (ML) algorithms. However, the conventional device…

Emerging Technologies · Computer Science 2022-03-14 Yingheng Tang , Princess Tara Zamani , Ruiyang Chen , Jianzhu Ma , Minghao Qi , Cunxi Yu , Weilu Gao

Expanding Deep Learning applications toward edge computing demands architectures capable of delivering high computational performance and efficiency while adhering to tight power and memory constraints. Digital In-Memory Computing (DIMC)…

Hardware Architecture · Computer Science 2026-02-03 Tommaso Spagnolo , Cristina Silvano , Riccardo Massa , Filippo Grillotti , Thomas Boesch , Giuseppe Desoli

Transformer architectures, particularly Diffusion Transformers (DiTs), have become widely used in diffusion and flow-matching models due to their strong performance compared to convolutional UNets. However, the isotropic design of DiTs…

Computer Vision and Pattern Recognition · Computer Science 2026-04-07 Quan Dao , Dimitris Metaxas

Optical and optoelectronic approaches of performing matrix-vector multiplication (MVM) operations have shown the great promise of accelerating machine learning (ML) algorithms with unprecedented performance. The incorporation of…

Emerging Technologies · Computer Science 2020-12-04 Weilu Gao , Cunxi Yu , Ruiyang Chen

Multi-Head Attention (MHA) is a critical computational kernel in transformer-based AI models. Emerging scalable tile-based accelerator architectures integrate increasing numbers of tightly-packed processing elements (PEs) with tensor units.…

Hardware Architecture · Computer Science 2025-05-27 Chi Zhang , Luca Colagrande , Renzo Andri , Thomas Benz , Gamze Islamoglu , Alessandro Nadalini , Francesco Conti , Yawei Li , Luca Benini

Specialized accelerators for tensor-operations, such as blocked-matrix operations and multi-dimensional convolutions, have been emerged as powerful architecture choices for high-performance Deep-Learning computing. The rapid development of…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-04-24 Dionysios Diamantopoulos , Burkhard Ringlein , Mitra Purandare , Gagandeep Singh , Christoph Hagleitner

In-DRAM Processing-In-Memory (DRAM-PIM) has emerged as a promising approach to accelerate memory-intensive workloads by mitigating data transfer overhead between DRAM and the host processor. Bit-serial DRAM-PIM architectures, further…

Hardware Architecture · Computer Science 2025-12-11 Siyuan Ma , Jiajun Hu , Jeeho Ryoo , Aman Arora , Lizy Kurian John

General Matrix Multiplication (GEMM) is a critical kernel in high-performance computing and deep learning. While modern architectures like ARM's Scalable Matrix Extension (SME) introduce dedicated hardware for matrix operations, existing…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-29 Chencheng Deng , Weiling Yang , Jianbin Fang , Dezun Dong

Modern transformer-based Large Language Models (LLMs) are constructed with a series of decoder blocks. Each block comprises three key components: (1) QKV generation, (2) multi-head attention, and (3) feed-forward networks. In batched…

Hardware Architecture · Computer Science 2024-06-21 Guseul Heo , Sangyeop Lee , Jaehong Cho , Hyunmin Choi , Sanghyeon Lee , Hyungkyu Ham , Gwangsun Kim , Divya Mahajan , Jongse Park

Bit-serial Processing-In-Memory (PIM) is an attractive paradigm for accelerator architectures, for parallel workloads such as Deep Learning (DL), because of its capability to achieve massive data parallelism at a low area overhead and…

Hardware Architecture · Computer Science 2023-11-21 Aman Arora , Jian Weng , Siyuan Ma , Tony Nowatzki , Lizy K. John

Designing field-programmable gate array (FPGA)-based accelerators for modern artificial intelligence workloads requires navigating a large and complex hardware design space encompassing architectural parameters, dataflow strategies, and…

Hardware Architecture · Computer Science 2026-05-08 Vinamra Sharma , Xingjian Fu , Jude Haris , José Cano

Transformers have revolutionized deep learning with applications in natural language processing, computer vision, and beyond. However, their computational demands make it challenging to deploy them on low-power edge devices. This paper…

Hardware Architecture · Computer Science 2025-07-18 Rohit Prasad

Edge computing is a popular target for accelerating machine learning algorithms supporting mobile devices without requiring the communication latencies to handle them in the cloud. Edge deployments of machine learning primarily consider…

Hardware Architecture · Computer Science 2024-10-28 Sébastien Ollivier , Sheng Li , Yue Tang , Chayanika Chaudhuri , Peipei Zhou , Xulong Tang , Jingtong Hu , Alex K. Jones
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