Related papers: Timing-Error Optimized Architecture for Current-St…

In future high-capacity wireless systems based on mmWave or massive multiple input multiple output (MIMO), the power consumption of receiver Analog to Digital Converters (ADC) is a concern. Although hybrid or analog systems with fewer ADCs…

In this work, we investigate dynamic oversampling techniques for large-scale multiple-antenna systems equipped with low-cost and low-power 1-bit analog-to-digital converters at the base stations. To compensate for the performance loss…

In this study, we analyze the codebook design used for analog beamforming. Analog beamforming and combining suffer from a subspace sampling limitation, that is, the receiver cannot directly observe the channel coefficients; instead, the…

A recent algorithmic family for distributed optimization, DIGing's, have been shown to have geometric convergence over time-varying undirected/directed graphs. Nevertheless, an identical step-size for all agents is needed. In this paper, we…

Multiple-antenna systems is a key technique to serve multiple users in future wireless systems. For low energy consumption and hardware complexity we first consider transmit symbols with constant magnitude and then 1-bit digital-to-analog…

The Transformer architecture is widely used for machine translation tasks. However, its resource-intensive nature makes it challenging to implement on constrained embedded devices, particularly where available hardware resources can vary at…

Novel techniques based on signal-conditioning are presented to mitigate timing errors in time-interleaved ADCs. A theoretical bound on the achievable spurious signal content, on applying the techniques, is also derived. Behavioral…

In a growing number of applications, there is a need to digitize signals whose spectral characteristics are challenging for traditional Analog-to-Digital Converters (ADCs). Examples, among others, include systems where the ADC must acquire…

High resolution analog to digital converters (ADCs) are conventionally used at the receiver terminals to store an accurate digital representation of the received signal, thereby allowing for reliable decoding of transmitted messages.…

Statistical static timing analysis deals with the increasing variations in manufacturing processes to reduce the pessimism in the worst case timing analysis. Because of the correlation between delays of circuit components, timing model…

Dynamic comparators are the core of high-speed, high-resolution analog-to-digital converters (ADCs) used for communication applications. Most of the dynamic comparators attain high-speed operation only for sufficiently high input difference…

Cell-free massive MIMO has matured into a key candidate technology for 6G and beyond, owing to its ability to provide nearly uniform service quality to many user equipments (UEs) over the same time-frequency resources. Unlike conventional…

This paper discusses a linear programming approach for designing switching signals for controlled rectifiers to achieve a low input current & output voltage total harmonic distortions. The focus here is on fully controlled rectifiers made…

Analog-to-digital converters (ADCs) play a vital important role in any devices via manipulating analog signals in a digital manner. Given that the amplitude of the signal exceeds the dynamic range of the ADCs, clipping occurs and the…

Timing systems based on Analog-to-Digital Converters are widely used in the design of previous high energy physics detectors. In this paper, we propose a new method based on deep learning to extract the time information from a finite set of…

We propose a low-resolution analog-to-digital converter (ADC) module assisted hybrid beamforming architecture for millimeter-wave (mmWave) communications. We prove that the proposed low-cost and flexible architecture can reduce the beam…

This paper proposes a "quasi-synchronous" design approach for signal processing circuits, in which timing violations are permitted, but without the need for a hardware compensation mechanism. The case of a low-density parity-check (LDPC)…

This paper investigates a hardware-efficient massive multiple-input multiple-output integrated sensing and communication (MIMO-ISAC) system with 1-bit analog-to-digital converters (ADCs)/digital-to-analog converters (DACs). The proposed…

We propose a new coding scheme, called the delayed coding (DC) scheme, for channels with insertion, deletion, and substitution (IDS) errors. The proposed scheme employs delayed encoding and non-iterative detection and decoding strategies to…

In automotive power electronics, distortion and electromagnetic interference (EMI) generated by the switching action of power semiconductors can be a significant challenge for the design of a compact, lightweight vehicle. As semiconductor…