English
Related papers

Related papers: DCO: Dynamic Cache Orchestration for LLM Accelerat…

200 papers

To mitigate the performance gap between CPU and the main memory, multi-level cache architectures are widely used in modern processors. Therefore, modeling the behaviors of the downstream caches becomes a critical part of the processor…

Hardware Architecture · Computer Science 2020-10-13 Ming Ling , Jiancong Ge , Guangmin Wang

As the CMOS technology pushes to the nanoscale, aging effects and process variations have become increasingly pronounced, posing significant reliability challenges for AI accelerators. Traditional guardband-based design approaches, which…

Hardware Architecture · Computer Science 2026-01-21 Meng Li , Tong Xie , Zuodong Zhang , Runsheng Wang

Modern large language model workloads put increasing demands on parallel compute capability and on-chip memory capacity, while also stressing fine-grained data movement and synchronization. These trends motivate exploring and designing…

Hardware Architecture · Computer Science 2026-05-11 Yinrong Li , Zexin Fu , Yichao Zhang , Germain Haugou , Chi Zhang , Marco Bertuletti , Bowen Wang , Luca Benini

With the widespread adoption of Large Language Models (LLMs), the demand for high-performance LLM inference services continues to grow. To meet this demand, a growing number of AI accelerators have been proposed, such as Google TPU, Huawei…

Hardware Architecture · Computer Science 2025-10-08 Tianhao Zhu , Dahu Feng , Erhu Feng , Yubin Xia

Autoregressive (AR) large language models (LLMs) have achieved remarkable performance across a wide range of natural language tasks, yet their inherent sequential decoding limits inference efficiency. In this work, we propose Fast-dLLM v2,…

Computation and Language · Computer Science 2025-10-01 Chengyue Wu , Hao Zhang , Shuchen Xue , Shizhe Diao , Yonggan Fu , Zhijian Liu , Pavlo Molchanov , Ping Luo , Song Han , Enze Xie

Cache plays an important role to maintain high and stable performance (i.e. high throughput, low tail latency and throughput jitter) in storage systems. Existing rule-based cache management methods, coupled with engineers' manual…

Hardware Architecture · Computer Science 2022-03-28 Ji Zhang , Xijun Li , Xiyao Zhou , Mingxuan Yuan , Zhuo Cheng , Keji Huang , Yifan Li

The rapid rise of large language models (LLMs) has been driving an enormous demand for AI inference infrastructure, mainly powered by high-end GPUs. While these accelerators offer immense computational power, they incur high capital and…

Artificial Intelligence · Computer Science 2025-10-01 Jovan Stojkovic , Chaojie Zhang , Íñigo Goiri , Ricardo Bianchini

The increasing adoption of large language models (LLMs) necessitates inference serving systems that can deliver both high throughput and low latency. Deploying LLMs with hundreds of billions of parameters on memory-constrained GPUs exposes…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-03-10 Bowen Pang , Kai Li , Feifan Wang

Large language models (LLMs) are typically served from clusters of GPUs/NPUs that consist of large number of devices. Unfortunately, communication between these devices incurs significant overhead, increasing the inference latency and cost…

Artificial Intelligence · Computer Science 2025-05-27 Ahmet Caner Yüzügüler , Jiawei Zhuang , Lukas Cavigelli

Large language models (LLMs) are adopted for software and hardware design, yet these domains are still evaluated separately. Software benchmarks typically assume fixed hardware targets, while hardware benchmarks focus on component-level…

Hardware Architecture · Computer Science 2026-05-20 Pei-Huan Tsai , Kuan-Lin Chiu , William Baisi , Pin-Yu Chen , Luca P. Carloni

The integration of AI-assisted coding tools within development environments drastically reduces development time, and allows developers to focus more on creative and critical aspects of software engineering through the use of Code Large…

Software Engineering · Computer Science 2025-03-26 Kishanthan Thangarajah , Arthur Leung , Boyuan Chen , Ahmed E. Hassan

Multi-core architectures feature an intricate hierarchy of cache memories, with multiple levels and sizes. To adequately decompose an application according to the traits of a particular memory hierarchy is a cumbersome task that may be…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-11-20 Hervé Paulino , Nuno Delgado

Cooperative edge caching in overlapping zones couples Base Station (BS) decisions, making content replacement sensitive to spatial topology and temporal reuse. Conventional heuristics suffer from myopia, while Deep Reinforcement Learning…

Networking and Internet Architecture · Computer Science 2026-04-03 Ning Yang , Wentao Wang , Lingtao Ouyang , Haijun Zhang

Meeting the strict Quality of Service (QoS) requirements of terminals has imposed a signiffcant challenge on Multiaccess Edge Computing (MEC) systems, due to the limited multidimensional resources. To address this challenge, we propose a…

Networking and Internet Architecture · Computer Science 2024-04-29 Qianqian Liu , Haixia Zhang , Xin Zhang , Dongfeng Yuan

Large Language Models (LLMs) are increasingly deployed in both latency-sensitive online services and cost-sensitive offline workloads. Co-locating these workloads on shared serving instances can improve resource utilization, but directly…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-01 Siyu Wu , Zihan Tang , Yuting Zeng , Hui Chen , Guiguang Ding , Tongxuan Liu , Ke Zhang , Hailong Yang

Large language model (LLM) inference has been a prevalent demand in daily life and industries. The large tensor sizes and computing complexities in LLMs have brought challenges to memory, computing, and databus. This paper proposes a…

Hardware Architecture · Computer Science 2025-09-19 Yimin Wang , Yue Jiet Chong , Xuanyao Fong

Memory allocation, though constituting only a small portion of the executed code, can have a "butterfly effect" on overall program performance, leading to significant and far-reaching impacts. Despite accounting for just approximately 5% of…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-08-29 Ruihao Li , Qinzhe Wu , Krishna Kavi , Gayatri Mehta , Jonathan C. Beard , Neeraja J. Yadwadkar , Lizy K. John

The explosive growth of Large Language Models (LLMs), such as GPT-4 with 1.8 trillion parameters, demands a fundamental rethinking of data center architecture to ensure scalability, efficiency, and cost-effectiveness. Our work provides a…

Hardware Architecture · Computer Science 2025-09-09 Jesmin Jahan Tithi , Hanjiang Wu , Avishaii Abuhatzera , Fabrizio Petrini

Large language models (LLMs) are increasingly used for long-content generation (e.g., long Chain-of-Thought reasoning) where decoding efficiency becomes a critical bottleneck: Autoregressive decoding is inherently limited by its sequential…

Computation and Language · Computer Science 2025-06-05 Zhepei Wei , Wei-Lin Chen , Xinyu Zhu , Yu Meng

Diffusion language models (DLMs) have emerged as a promising alternative to the long-dominant autoregressive (AR) paradigm, offering a parallelable decoding process that could yield greater efficiency. Yet, in practice, current open-source…

Computation and Language · Computer Science 2025-11-11 Han Peng , Peiyu Liu , Zican Dong , Daixuan Cheng , Junyi Li , Yiru Tang , Shuo Wang , Wayne Xin Zhao