Related papers: Superconducting Qubit Gates Robust to Parameter Fl…
Numerical simulation results are presented which suggest that a class of non-adiabatic rapid passage sweeps first realized experimentally in 1991 should be capable of implementing a set of quantum gates that is universal for one-qubit…
The reproducibility of qubit parameters is a challenge for scaling up superconducting quantum processors. Signal crosstalk imposes constraints on the frequency separation between neighboring qubits. The frequency uncertainty of transmon…
We demonstrate diabatic two-qubit gates with Pauli error rates down to $4.3(2)\cdot 10^{-3}$ in as fast as 18 ns using frequency-tunable superconducting qubits. This is achieved by synchronizing the entangling parameters with minima in the…
We study the performance of composite pulses in the presence of time-varying control noise on a single qubit. These protocols, originally devised only to correct for static, systematic errors, are shown to be robust to time-dependent…
Working with trapped atoms at close distance to each other, we show that one can implement entangling gates based on non-independent qubits using a single pulse per qubit, or a single structured pulse. The optimal parameters depend on…
Microwave trapped-ion quantum logic gates avoid spontaneous emission as a fundamental source of decoherence. However, microwave two-qubit gates are still slower than laser-induced gates and hence more sensitive to fluctuations and noise of…
Inductively shunted superconducting qubits, such as the unimon qubit, combine high anharmonicity with protection from low-frequency charge noise, positioning them as promising candidates for the implementation of fault-tolerant…
Parasitic two-level-system (TLS) defects limit the stability and performance of solid-state quantum processors. Their interaction with a qubit can cause discrete, stochastic shifts of the qubit frequency, making the qubit bistable. We…
We show a pulse-efficient circuit transpilation framework for noisy quantum hardware. This is achieved by scaling cross-resonance pulses and exposing each pulse as a gate to remove redundant single-qubit operations with the…
The experimental optimization of a two-qubit controlled-Z (CZ) gate is realized following two different data-driven gradient ascent pulse engineering (GRAPE) protocols in the aim of optimizing the gate operator and the output quantum state,…
Scalable coherent control hardware for quantum information platforms is rapidly growing in priority as their number of available qubits continues to increase. As these systems scale, more calibration steps are needed, leading to challenges…
We analyze a scheme for quantum computation where quantum gates can be continuously changed from standard dynamic gates to purely geometric ones. These gates are enacted by controlling a set of parameters that are subject to unwanted…
The Robust Phase Estimation (RPE) protocol was designed to be an efficient and robust way to calibrate quantum operations. The robustness of RPE refers to its ability to estimate a single parameter, usually gate amplitude, even when other…
Silicon offers an attractive material platform for hardware realization of quantum computing. In this study, a microscopic stochastic simulation method is developed to model the effect of random interface charge traps in silicon…
Quantum computing has garnered attention for its potential to solve complex computational problems with considerable speedup. Despite notable advancements in the field, achieving meaningful scalability and noise control in quantum hardware…
We analyze a high-fidelity two-qubit gate using fast flux pulses on superconducting fluxonium qubits. The gate is realized by temporarily detuning magnetic flux through fluxonium loop away from the half flux quantum sweet spot. We simulate…
Capacitively coupled semiconductor spin qubits hold promise as the building blocks of a scalable quantum computing architecture with long-range coupling between distant qubits. However, the two-qubit gate fidelities achieved in experiments…
Implementation of high-fidelity two-qubit operations is a key ingredient for scalable quantum error correction. In superconducting qubit architectures tunable buses have been explored as a means to higher fidelity gates. However, these…
A challenge in building large-scale superconducting quantum processors is to find the right balance between coherence, qubit addressability, qubit-qubit coupling strength, circuit complexity and the number of required control lines. Leading…
We have integrated single and coupled superconducting transmon qubits into flip-chip modules. Each module consists of two chips -- one quantum chip and one control chip -- that are bump-bonded together. We demonstrate time-averaged…