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To alleviate the performance and energy overheads of contemporary applications with large data footprints, we propose the Two Level Perceptron (TLP) predictor, a neural mechanism that effectively combines predicting whether an access will…

Hardware Architecture · Computer Science 2025-11-04 Alexandre Valentin Jamet , Georgios Vavouliotis , Daniel A. Jiménez , Lluc Alvarez , Marc Casas

Modern datacenter applications are prone to high tail latencies since their requests typically follow highly-dispersive distributions. Delivering fast interrupts is essential to reducing tail latency. Prior work has proposed both OS- and…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-11-14 Lisa , Li , Nikita Lazarev , David Koufaty , Yijun Yin , Andy Anderson , Zhiru Zhang , Edward Suh , Kostis Kaffes , Christina Delimitrou

We propose a new decentralized coded caching scheme for a two-phase caching network, where the data placed in user caches in the prefetching phase are random portions of a maximal distance separable (MDS) coded version of the original…

Information Theory · Computer Science 2018-06-27 Yi-Peng Wei , Sennur Ulukus

During inference for transformer-based large language models (LLM), prefilling is the computation of the key-value (KV) cache for input tokens in the prompt prior to autoregressive generation. For longer input prompt lengths, prefilling…

Machine Learning · Computer Science 2024-04-16 Siyan Zhao , Daniel Israel , Guy Van den Broeck , Aditya Grover

High-throughput inference serving is essential for applications built on large language models (LLMs). Existing serving frameworks reduce request-level and batch-level bubbles through batching and scheduling, but often overlook bubbles…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-25 Fengyao Bai , Hongbin Zhang , Zhitao Chen , Jiangsu Du , Zhiguang Chen , Yutong Lu

Serving large language models (LLMs) is important for cloud providers, and caching intermediate results (KV\$) after processing each request substantially improves serving throughput and latency. However, there is limited understanding of…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-02-17 Jiahao Wang , Jinbo Han , Xingda Wei , Sijie Shen , Dingyan Zhang , Chenguang Fang , Rong Chen , Wenyuan Yu , Haibo Chen

Cache plays a critical role in reducing the performance gap between CPU and main memory. A modern multi-core CPU generally employs a multi-level hierarchy of caches, through which the most recently and frequently used data are maintained in…

Hardware Architecture · Computer Science 2021-06-01 Rui Wang , Chundong Wang , Chongnan Ye

Serving systems for Large Language Models (LLMs) improve throughput by processing several requests concurrently. However, multiplexing hardware resources between concurrent requests involves non-trivial scheduling decisions. Practical…

Machine Learning · Computer Science 2025-01-29 Ferdi Kossmann , Bruce Fontaine , Daya Khudia , Michael Cafarella , Samuel Madden

Prefetching web pages is a well-studied solution to reduce network latency by predicting users' future actions based on their past behaviors. However, such techniques are largely unexplored on mobile platforms. Today's privacy regulations…

Software Engineering · Computer Science 2021-03-25 Yixue Zhao , Siwei Yin , Adriana Sejfia , Marcelo Schmitt Laser , Haoyu Wang , Nenad Medvidovic

This paper comprehensively studies a content-centric mobile network based on a preference learning framework, where each mobile user is equipped with a finite-size cache. We consider a practical scenario where each user requests a content…

Networking and Internet Architecture · Computer Science 2020-02-21 Adeel Malik , Joongheon Kim , Kwang Soon Kim , Won-Yong Shin

In this paper, we reveal the existence of a new class of prefetcher, the XPT prefetcher, in the modern Intel processors which has never been officially documented. It speculatively issues a load, bypassing last-level cache (LLC) lookups,…

Cryptography and Security · Computer Science 2023-06-21 Yun Chen , Ali Hajiabadi , Lingfeng Pei , Trevor E. Carlson

While next-generation wireless communication networks intend leveraging edge caching for enhanced spectral efficiency, quality of service, end-to-end latency, content sharing cost, etc., several aspects of it are yet to be addressed to make…

Networking and Internet Architecture · Computer Science 2020-09-17 Md Ferdous Pervej , Le Thanh Tan , Rose Qingyang Hu

Large language models (LLMs) have demonstrated remarkable capabilities across a variety of tasks. One of the main challenges towards the successful deployment of LLMs is memory management, since they typically involve billions of…

Machine Learning · Computer Science 2025-09-03 Spyros Angelopoulos , Loris Marchal , Adrien Obrecht , Bertrand Simon

In modern GPU inference, cache efficiency remains a major bottleneck, and heuristic policies such as \textsc{LRU} can perform far worse than the offline optimum. Existing learning-based caching systems improve hit rates mainly through…

Modern software executes a large amount of code. Previous techniques of code layout optimization were developed one or two decades ago and have become inadequate to cope with the scale and complexity of new types of applications such as…

Programming Languages · Computer Science 2018-10-03 Rahman Lavaee , John Criswell , Chen Ding

Applications with irregular data structures, data-dependent control flows and fine-grained data transfers (e.g., real-world graph computations) perform poorly on cache-based systems. We propose the UpDown accelerator that supports…

Large Language Models (LLMs) are transforming recommendation from ranking into a generative task, but industrial deployment remains limited by the high latency of processing long, personalized prompts. Standard prefix caching provides…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-11 Zhan Zhao , Yuxin Wang , Amelie Chi Zhou

The memory subsystem has always been a bottleneck in performance as well as significant power contributor in memory intensive applications. Many researchers have presented multi-layered memory hierarchies as a means to design energy and…

Hardware Architecture · Computer Science 2011-11-09 Minas Dasygenis , Erik Brockmeyer , Bart Durinck , Francky Catthoor , Dimitrios Soudris , Antonios Thanailakis

Switching, routing, and security functions are the backbone of packet processing networks. Fast and efficient processing of packets requires maintaining the state of a large number of transient network connections. In particular, modern…

Networking and Internet Architecture · Computer Science 2023-05-05 Luke McHale , Paul V Gratz , Alex Sprintson

Recently the generative Large Language Model (LLM) has achieved remarkable success in numerous applications. Notably its inference generates output tokens one-by-one, leading to many redundant computations. The widely-used KV-Cache…

Machine Learning · Computer Science 2024-12-10 Weizhuo Li , Zhigang Wang , Yu Gu , Ge Yu