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Quantum low-density parity-check (qLDPC) codes offer a promising route to scalable fault-tolerant quantum computation with constant overhead. Recent advancements have shown that qLDPC codes can outperform the quantum memory capability of…
Quantum Error Correction (QEC) codes store information reliably in logical qubits by encoding them in a larger number of less reliable qubits. The surface code, known for its high resilience to physical errors, is a leading candidate for…
Compiling quantum circuits to account for hardware restrictions is an essential part of the quantum computing stack. Circuit compilation allows us to adapt algorithm descriptions into a sequence of operations supported by real quantum…
In this paper, we address some of the key limitations to realizing a generic heterogeneous parallel programming model for quantum-classical heterogeneous platforms. We discuss our experience in enabling user-level multi-threading in QCOR as…
It is the prevailing belief that quantum error correcting techniques will be required to build a utility-scale quantum computer able to perform computations that are out of reach of classical computers. The QECCs that have been most…
Quantum low-density parity-check (qLDPC) codes are a promising construction for drastically reducing the overhead of fault-tolerant quantum computing (FTQC) architectures. However, all of the known hardware implementations of these codes…
Logical qubits can be protected from decoherence by performing QEC cycles repeatedly. Algorithms for fault-tolerant QEC must be compiled to the specific hardware platform under consideration in order to practically realize a quantum memory…
Ion trap quantum hardware promises to provide a computational advantage over classical computing for specific problem spaces while also providing an alternative hardware implementation path to cryogenic quantum systems as typified by IBM's…
With fault-tolerant quantum computing (FTQC) on the horizon, it is critical to understand sources of logical error in plausible hardware implementations of quantum error-correcting codes (QECC). In this work, we consider logical error rates…
Recent research on vision backbone architectures has predominantly focused on optimizing efficiency for hardware platforms with high parallel processing capabilities. This category increasingly includes embedded systems such as mobile…
Recent advances in quantum error-correction (QEC) have shown that it is often beneficial to understand fault-tolerance as a dynamical process, a circuit with redundant measurements that help correct errors, rather than as a static code…
Trapped ions (TI) are a leading candidate for building Noisy Intermediate-Scale Quantum (NISQ) hardware. TI qubits have fundamental advantages over other technologies such as superconducting qubits, including high qubit quality, coherence…
Achieving scalable, fault-tolerant quantum computation requires quantum memory architectures that minimize error correction overhead while preserving coherence. This work presents a framework for high-dimensional qudit memory in…
Exploring an efficient and scalable architecture of fault-tolerant quantum computing (FTQC) is vital for demonstrating useful quantum computing. Here, we propose and evaluate a scalable and practical architecture with a…
With the growth of quantum platforms for gate-based quantum computation, compilation holds a crucial role in deciding the success of the implementation. While there has been rich research in compilation techniques for the…
In this work, we first characterize the hybrid execution patterns of GCNs on Intel Xeon CPU. Guided by the characterization, we design a GCN accelerator, HyGCN, using a hybrid architecture to efficiently perform GCNs. Specifically, first,…
Conventional approaches to fault-tolerant quantum computing realize logical circuits gate-by-gate, synthesizing each gate independently on one or more code blocks. This incurs excess overhead and doesn't leverage common structures in…
We introduce a new high-performance design for parallelism within the Quantum Monte Carlo code QMCPACK. We demonstrate that the new design is better able to exploit the hierarchical parallelism of heterogeneous architectures compared to the…
Building blocks of quantum computers have been demonstrated in small to intermediate-scale systems. As one of the leading platforms, the trapped ion system has attracted wide attention. A significant challenge in this system is to combine…
Scaling up quantum computers to attain substantial speedups over classical computing requires fault tolerance. Conventionally, protocols for fault-tolerant quantum computation demand excessive space overheads by using many physical qubits…