Related papers: Uncertainty-Guided Live Measurement Sequencing for…

This paper builds on our Uncertainty-Guided Live Measurement Sequencing (UGLMS) method. UGLMS is a closed-loop test strategy that adaptively selects SAR ADC code edges based on model uncertainty and refines a behavioral mismatch model in…

In this contribution, it is proposes to limit the quantization search space of a successive approximation analog-to-digital converter through an analytic derivation of maximum possible sample-to-sample variation. The presented example…

Conventional analog and mixed-signal (AMS) circuit designs heavily rely on manual effort, which is time-consuming and labor-intensive. This paper presents a fully automated design methodology for Successive Approximation Register (SAR)…

Time-interleaved ADCs (TI-ADCs) achieve high sampling rates by interleaving multiple sub-ADCs in parallel. Mismatch errors between the sub-ADCs, however, can significantly degrade the signal quality, which is a main performance bottleneck.…

This work presents a supervised machine-learning (ML) approach for blind digital calibration of SAR ADCs without requiring prior knowledge of errors. A low-speed reference ADC is used to train a shallow neural network (NN) to estimate…

Pipelined analog-to-digital converters (ADCs) are fundamental components of various signal processing systems requiring high sampling rates and a high linearity. Over the past years, calibration techniques have been intensively investigated…

Reduction of comparison cycles leads to power savings of a successive-approximation-register (SAR) analog-to-digital converters (ADC). We establish that the lowest average number of comparison cycles of a SAR ADC approaches the entropy of…

Active learning improves the performance of machine learning methods by judiciously selecting a limited number of unlabeled data points to query for labels, with the aim of maximally improving the underlying classifier's performance. Recent…

The design and measurement results of ultra-low power, fast 10-bit Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) prototypes in 65 nm CMOS technology are presented. Eight prototype ADCs were designed using two…

This paper presents a differential 10-bit 2 MS/s successive approximation register (SAR) analog-to-digital converter (ADC) with a precision-improvement technique. The proposed method breaks the direct tradeoff between the capacitive…

Increasingly demanding performance requirements for dynamical systems motivates the adoption of nonlinear and adaptive control techniques. One challenge is the nonlinearity of the resulting closed-loop system complicates verification that…

Adapting the modulation and coding scheme (MCS) to the wireless link quality is critical for maximizing spectral efficiency while ensuring reliability. We propose SALAD (self-adaptive link adaptation), an algorithm that exclusively…

Pipelined analog-to-digital converters (ADCs) are key enablers in many state-of-the-art signal processing systems with high sampling rates. In addition to high sampling rates, such systems often demand a high linearity. To meet these…

Recently, the rapid development of Solid-State LiDAR (SSL) enables low-cost and efficient obtainment of 3D point clouds from the environment, which has inspired a large quantity of studies and applications. However, the non-uniformity of…

We introduce a novel direct calibration algorithm to address phase delay, gain, and offset mismatches in Analog-to-Digital Converter (ADC) time interleaving systems. These mismatches, common in high-speed data acquisition, degrade system…

Using a laser-based ranging method for precise environmental 3D sensing, LiDAR has numerous applications in science and industry. However, conventional LiDAR face challenges in simultaneously achieving high ranging precision and fast…

Linear Hall sensors are a cost-effective alternative to optical encoders for measuring the rotor positions of actuators, with the main challenge being that they exhibit position-dependent inaccuracies resulting from manufacturing…

The Self-Excited Loop (SEL) architecture, used in some continuous-wave (CW) superconducting linacs, relies on a positive feedback mechanism that requires carefully defined operating limits to ensure stable operation. These limits are…

Emerging wireless control applications demand for extremely high closed-loop reliability under strict latency constraints, which the conventional Automatic Repeat reQuest (ARQ) solutions with static schedules fail to provide. To overcome…

This paper presents a system-level optimization framework for automated asynchronous SAR ADC design, addressing the limitations of block-level methods in terms of suboptimal performance and manual effort. The proposed approach integrates a…