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Tensor processing units (TPUs), specialized hardware accelerators for machine learning tasks, have shown significant performance improvements when executing convolutional layers in convolutional neural networks (CNNs). However, they…

Hardware Architecture · Computer Science 2023-04-20 Mohammed E. Elbtity , Brendan Reidy , Md Hasibul Amin , Ramtin Zand

In this paper, we develop an in-memory analog computing (IMAC) architecture realizing both synaptic behavior and activation functions within non-volatile memory arrays. Spin-orbit torque magnetoresistive random-access memory (SOT-MRAM)…

Hardware Architecture · Computer Science 2021-09-15 Mohammed Elbtity , Abhishek Singh , Brendan Reidy , Xiaochen Guo , Ramtin Zand

Modern out-of-order processors have increased capacity to exploit instruction level parallelism (ILP) and memory level parallelism (MLP), e.g., by using wide superscalar pipelines and vector execution units, as well as deep buffers for…

Programming Languages · Computer Science 2018-07-05 Vladimir Kiriansky , Haoran Xu , Martin Rinard , Saman Amarasinghe

In-memory computing (IMC) with non-volatile memories (NVMs) has emerged as a promising approach to address the rapidly growing computational demands of Deep Neural Networks (DNNs). Mapping DNN layers spatially onto NVM-based IMC…

Hardware Architecture · Computer Science 2023-12-07 Abinand Nallathambi , Christin David Bose , Wilfried Haensch , Anand Raghunathan

The popularity of Convolutional Neural Network (CNN) models and the ubiquity of CPUs imply that better performance of CNN model inference on CPUs can deliver significant gain to a large number of users. To improve the performance of CNN…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-07-09 Yizhi Liu , Yao Wang , Ruofei Yu , Mu Li , Vin Sharma , Yida Wang

Deep-learning models such as Convolutional Neural Networks (CNN) and Long Short-Term Memory (LSTM) have been successfully used for process-mining tasks. They have achieved better performance for different predictive tasks than traditional…

Machine Learning · Computer Science 2021-05-04 Ishwar Venugopal , Jessica Töllich , Michael Fairbank , Ansgar Scherp

In-memory computing hardware accelerators allow more than 10x improvements in peak efficiency and performance for matrix-vector multiplications (MVM) compared to conventional digital designs. For this, they have gained great interest for…

Hardware Architecture · Computer Science 2024-09-19 Pouya Houshmand , Marian Verhelst

Efficient and timely calculations of Machine Learning (ML) algorithms are essential for emerging technologies like autonomous driving, the Internet of Things (IoT), and edge computing. One of the primary ML algorithms used in such systems…

Hardware Architecture · Computer Science 2023-08-11 Christopher A. Metz

Solving constrained nonlinear programs (NLPs) is of great importance in various domains such as power systems, robotics, and wireless communication networks. One widely used approach for addressing NLPs is the interior point method (IPM).…

Optimization and Control · Mathematics 2024-10-22 Xi Gao , Jinxin Xiong , Akang Wang , Qihong Duan , Jiang Xue , Qingjiang Shi

Leveraging large data sets, deep Convolutional Neural Networks (CNNs) achieve state-of-the-art recognition accuracy. Due to the substantial compute and memory operations, however, they require significant execution time. The massive…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-10-13 Chao Li , Yi Yang , Min Feng , Srimat Chakradhar , Huiyang Zhou

RRAM-based multi-core systems improve the energy efficiency and performance of CNNs. Thereby, the distributed parallel execution of convolutional layers causes critical data dependencies that limit the potential speedup. This paper presents…

Hardware Architecture · Computer Science 2023-10-27 Rebecca Pelke , Nils Bosbach , Jose Cubero , Felix Staudigl , Rainer Leupers , Jan Moritz Joseph

Due to their weak inductive bias, Multi-Layer Perceptrons (MLPs) have subpar performance at low-compute levels compared to standard architectures such as convolution-based networks (CNN). Recent work, however, has shown that the performance…

Machine Learning · Computer Science 2024-10-15 Sean Wu , Jordan Hong , Keyu Bai , Gregor Bachmann

Convolutional Neural Networks (CNNs) serve various applications with diverse performance and resource requirements. Model-aware CNN accelerators best address these diverse requirements. These accelerators usually combine multiple dedicated…

Hardware Architecture · Computer Science 2025-04-08 Fareed Qararyah , Mohammad Ali Maleki , Pedro Trancoso

Deployment of modern TinyML tasks on small battery-constrained IoT devices requires high computational energy efficiency. Analog In-Memory Computing (IMC) using non-volatile memory (NVM) promises major efficiency improvements in deep neural…

Hardware Architecture · Computer Science 2022-01-05 Angelo Garofalo , Gianmarco Ottavi , Francesco Conti , Geethan Karunaratne , Irem Boybat , Luca Benini , Davide Rossi

Convolutional Neural Networks (CNNs) combine large amounts of parallelizable computation with frequent memory access. Field Programmable Gate Arrays (FPGAs) can achieve low latency and high throughput CNN inference by implementing dataflow…

Hardware Architecture · Computer Science 2024-08-20 Mario Doumet , Marius Stan , Mathew Hall , Vaughn Betz

Deep learning training involves a large number of operations, which are dominated by high dimensionality Matrix-Vector Multiplies (MVMs). This has motivated hardware accelerators to enhance compute efficiency, but where data movement and…

Systems and Control · Electrical Eng. & Systems 2022-07-07 Christopher Grimm , Naveen Verma

Compute-In-Memory (CiM) is a promising solution to accelerate Deep Neural Networks (DNNs) as it can avoid energy-intensive DNN weight movement and use memory arrays to perform low-energy, high-density computations. These benefits have…

Hardware Architecture · Computer Science 2024-11-01 Tanner Andrulis , Joel S. Emer , Vivienne Sze

In this paper, we consider a multiuser mobile edge computing (MEC) system, where a mixed-integer offloading strategy is used to assist the resource assignment for task offloading. Although the conventional branch and bound (BnB) approach…

Signal Processing · Electrical Eng. & Systems 2022-03-21 Yurong Qian , Jindan Xu , Shuhan Zhu , Wei Xu , Lisheng Fan , George K. Karagiannidis

Bayesian Neural Networks (BNNs) provide superior estimates of uncertainty by generating an ensemble of predictive distributions. However, inference via ensembling is resource-intensive, requiring additional entropy sources to generate…

Emerging Technologies · Computer Science 2025-05-20 Prabodh Katti , Clement Ruah , Osvaldo Simeone , Bashir M. Al-Hashimi , Bipin Rajendran

Custom dataflow Convolutional Neural Network (CNN) inference accelerators on FPGA are tailored to a specific CNN topology and store parameters in On-Chip Memory (OCM), resulting in high energy efficiency and low inference latency. However,…

Hardware Architecture · Computer Science 2020-11-17 Lucian Petrica , Tobias Alonso , Mairin Kroes , Nicholas Fraser , Sorin Cotofana , Michaela Blott
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