English
Related papers

Related papers: Res-DPU: Resource-shared Digital Processing-in-mem…

200 papers

Processing-in-Memory (PIM) enhances memory with computational capabilities, potentially solving energy and latency issues associated with data transfer between memory and processors. However, managing concurrent computation and data flow…

Hardware Architecture · Computer Science 2025-05-09 Ahmed Mamdouh , Haoran Geng , Michael Niemier , Xiaobo Sharon Hu , Dayane Reis

Processing-in-memory (PIM) architectures have demonstrated great potential in accelerating numerous deep learning tasks. Particularly, resistive random-access memory (RRAM) devices provide a promising hardware substrate to build PIM…

Hardware Architecture · Computer Science 2022-02-01 Weidong Cao , Yilong Zhao , Adith Boloor , Yinhe Han , Xuan Zhang , Li Jiang

Processing-in-memory (PIM), as a novel computing paradigm, provides significant performance benefits from the aspect of effective data movement reduction. SRAM-based PIM has been demonstrated as one of the most promising candidates due to…

Hardware Architecture · Computer Science 2023-11-01 Cenlin Duan , Jianlei Yang , Xiaolin He , Yingjie Qi , Yikun Wang , Yiou Wang , Ziyan He , Bonan Yan , Xueyan Wang , Xiaotao Jia , Weitao Pan , Weisheng Zhao

Neural networks (NNs) are growing in importance and complexity. A neural network's performance (and energy efficiency) can be bound either by computation or memory resources. The processing-in-memory (PIM) paradigm, where computation is…

Hardware Architecture · Computer Science 2023-03-28 Geraldo F. Oliveira , Juan Gómez-Luna , Saugata Ghose , Amirali Boroumand , Onur Mutlu

Processing-in-Memory (PIM) architectures offer promising solutions for efficiently handling AI applications in energy-constrained edge environments. While traditional PIM designs enhance performance and energy efficiency by reducing data…

Hardware Architecture · Computer Science 2025-12-09 Sangmin Jeon , Kangju Lee , Kyeongwon Lee , Woojoo Lee

Modern Artificial Intelligence (AI) applications are increasingly utilizing multi-tenant deep neural networks (DNNs), which lead to a significant rise in computing complexity and the need for computing parallelism. ReRAM-based…

Emerging Technologies · Computer Science 2024-08-12 Bojing Li , Duo Zhong , Xiang Chen , Chenchen Liu

3D point cloud neural networks have significantly enhanced the perceptual capabilities of resource-limited mobile intelligent systems. However, despite the transformative impact, the point cloud algorithm suffers from substantial memory…

Hardware Architecture · Computer Science 2026-03-24 Dengfeng Wang , Shunqin Cai , Yanan Sun

Processing In Memory (PIM) accelerators are promising architecture that can provide massive parallelization and high efficiency in various applications. Such architectures can instantaneously provide ultra-fast operation over extensive…

Hardware Architecture · Computer Science 2022-07-26 Kazi Abu Zubair , Sumit Kumar Jha , David Mohaisen , Clayton Hughes , Amro Awad

The computing wall and data movement challenges of deep neural networks (DNNs) have exposed the limitations of conventional CMOS-based DNN accelerators. Furthermore, the deep structure and large model size will make DNNs prohibitive to…

Signal Processing · Electrical Eng. & Systems 2019-12-12 Geng Yuan , Xiaolong Ma , Sheng Lin , Zhengang Li , Caiwen Ding

Processing-in-memory (PIM) has emerged as a promising solution for accelerating memory-intensive workloads as they provide high memory bandwidth to the processing units. This approach has drawn attention not only from the academic community…

Hardware Architecture · Computer Science 2024-09-11 Dongjae Lee , Bongjoon Hyun , Taehun Kim , Minsoo Rhu

Decoder-only Transformer models such as GPT have demonstrated exceptional performance in text generation, by autoregressively predicting the next token. However, the efficacy of running GPT on current hardware systems is bounded by low…

Hardware Architecture · Computer Science 2024-04-16 Yuting Wu , Ziyu Wang , Wei D. Lu

The human brain simultaneously optimizes synaptic weights and topology by growing, pruning, and strengthening synapses while performing all computation entirely in memory. In contrast, modern artificial-intelligence systems separate weight…

Hardware Architecture · Computer Science 2025-06-17 Songqi Wang , Yue Zhang , Jia Chen , Xinyuan Zhang , Yi Li , Ning Lin , Yangu He , Jichang Yang , Yingjie Yu , Yi Li , Zhongrui Wang , Xiaojuan Qi , Han Wang

Stochastic computing (SC) offers hardware simplicity but suffers from low throughput, while high-throughput Digital Computing-in-Memory (DCIM) is bottlenecked by costly adder logic for matrix-vector multiplication (MVM). To address this…

Hardware Architecture · Computer Science 2026-01-13 Kunming Shao , Liang Zhao , Jiangnan Yu , Zhipeng Liao , Xiaomeng Wang , Yi Zou , Tim Kwang-Ting Cheng , Chi-Ying Tsui

DNNs are widely used but face significant computational costs due to matrix multiplications, especially from data movement between the memory and processing units. One promising approach is therefore Processing-in-Memory as it greatly…

Hardware Architecture · Computer Science 2024-01-19 Lorenzo Sonnino , Shaswot Shresthamali , Yuan He , Masaaki Kondo

In the era of artificial intelligence (AI), Transformer demonstrates its performance across various applications. The excessive amount of parameters incurs high latency and energy overhead when processed in the von Neumann architecture.…

Hardware Architecture · Computer Science 2025-02-14 Jae-Young Kim , Donghyuk Kim , Seungjae Yoo , Sungyeob Yoo , Teokkyu Suh , Joo-Young Kim

The increasing prevalence and growing size of data in modern applications have led to high costs for computation in traditional processor-centric computing systems. Moving large volumes of data between memory devices (e.g., DRAM) and…

Hardware Architecture · Computer Science 2022-06-01 Geraldo F. Oliveira , Juan Gómez-Luna , Saugata Ghose , Onur Mutlu

With the rapid advent of generative models, efficiently deploying these models on specialized hardware has become critical. Tensor Processing Units (TPUs) are designed to accelerate AI workloads, but their high power consumption…

Hardware Architecture · Computer Science 2025-03-04 Zhantong Zhu , Hongou Li , Wenjie Ren , Meng Wu , Le Ye , Ru Huang , Tianyu Jia

Compute-in-memory (CIM) techniques are widely employed in energy-efficient artificial intelligent (AI) processors. They alleviate power and latency bottlenecks caused by extensive data movements between compute and storage units. To extend…

Hardware Architecture · Computer Science 2025-12-15 Jianyi Yu , Tengxiao Wang , Yuxuan Wang , Xiang Fu , Fei Qiao , Ying Wang , Rui Yuan , Liyuan Liu , Cong Shi

Computing-in-memory (CIM) is renowned in deep learning due to its high energy efficiency resulting from highly parallel computing with minimal data movement. However, current SRAM-based CIM designs suffer from long latency for loading…

Due to the very rapidly growing use of Artificial Neural Networks (ANNs) in real-world applications related to machine learning and Artificial Intelligence (AI), several hardware accelerator de-signs for ANNs have been proposed recently. In…

Hardware Architecture · Computer Science 2021-03-09 Supreeth Mysore Shivanandamurthy , Ishan. G. Thakkar , Sayed Ahmad Salehi
‹ Prev 1 2 3 10 Next ›