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Transformers are gaining increasing attention across Natural Language Processing (NLP) application domains due to their outstanding accuracy. However, these data-intensive models add significant performance demands to the existing computing…

Hardware Architecture · Computer Science 2025-08-07 Ahmed J. Abdelmaksoud , Shady Agwa , Themis Prodromakis

Deep Neural Networks (DNNs) require highly efficient matrix multiplication engines for complex computations. This paper presents a systolic array architecture incorporating novel exact and approximate processing elements (PEs), designed…

Hardware Architecture · Computer Science 2026-03-24 Pragun Jaswal , L. Hemanth Krishna , B. Srinivasu

Transformer-based models are becoming more and more intelligent and are revolutionizing a wide range of human tasks. To support their deployment, AI labs offer inference services that consume hundreds of GWh of energy annually and charge…

Systems and Control · Electrical Eng. & Systems 2025-08-29 Ching-Yi Lin , Sahil Shah

Transformers are central to advances in artificial intelligence (AI), excelling in fields ranging from computer vision to natural language processing. Despite their success, their large parameter count and computational demands challenge…

Hardware Architecture · Computer Science 2025-03-10 Qunyou Liu , Marina Zapater , David Atienza

The computation and memory-intensive nature of DNNs limits their use in many mobile and embedded contexts. Application-specific integrated circuit (ASIC) hardware accelerators employ matrix multiplication units (such as the systolic arrays)…

Hardware Architecture · Computer Science 2024-02-02 Ruiqi Sun , Yinchen Ni , Xin He , Jie Zhao , An Zou

Processing-in-memory (PIM) architectures have demonstrated great potential in accelerating numerous deep learning tasks. Particularly, resistive random-access memory (RRAM) devices provide a promising hardware substrate to build PIM…

Hardware Architecture · Computer Science 2022-02-01 Weidong Cao , Yilong Zhao , Adith Boloor , Yinhe Han , Xuan Zhang , Li Jiang

Processing in-memory (PIM) is promising to accelerate neural networks (NNs) because it minimizes data movement and provides large computational parallelism. Similar to machine learning accelerators, application mapping, which determines the…

Hardware Architecture · Computer Science 2024-07-02 Xuan Wang , Minxuan Zhou , Tajana Rosing

Current inference systems for Mixture-of-Experts (MoE) models primarily employ static parallelization strategies. However, these static approaches cannot consistently achieve optimal performance across different inference scenarios, as they…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-08-28 Haoran Lin , Xianzhi Yu , Kang Zhao , Han Bao , Zongyuan Zhan , Ting Hu , Wulong Liu , Zekun Yin , Xin Li , Weiguo Liu

Active Inference (AIF) offers a robust framework for decision-making, yet its computational and memory demands pose challenges for deployment, especially in resource-constrained environments. This work presents a methodology that…

Artificial Intelligence · Computer Science 2025-08-20 Nikola Pižurica , Nikola Milović , Igor Jovančević , Conor Heins , Miguel de Prado

The ADMM-based interior point (ABIP, Lin et al. 2021) method is a hybrid algorithm that effectively combines interior point method (IPM) and first-order methods to achieve a performance boost in large-scale linear optimization. Different…

Optimization and Control · Mathematics 2024-04-09 Qi Deng , Qing Feng , Wenzhi Gao , Dongdong Ge , Bo Jiang , Yuntian Jiang , Jingsong Liu , Tianhao Liu , Chenyu Xue , Yinyu Ye , Chuwen Zhang

Arbitrary-precision integer multiplication is the core kernel of many applications in simulation, cryptography, etc. Existing acceleration of arbitrary-precision integer multiplication includes CPUs, GPUs, FPGAs, and ASICs. Among these…

Hardware Architecture · Computer Science 2023-09-22 Zhuoping Yang , Jinming Zhuang , Jiaqi Yin , Cunxi Yu , Alex K. Jones , Peipei Zhou

This paper presents an implementation of a floating-point-capable application-specific instruction set processor (ASIP) for both communication and positioning tasks using the massive multiple-input multiple-output (MIMO) technology. The…

Hardware Architecture · Computer Science 2025-02-17 Mohammad Attari , Ove Edfors , Liang Liu

The Transformer has been an indispensable staple in deep learning. However, for real-life applications, it is very challenging to deploy efficient Transformers due to immense parameters and operations of models. To relieve this burden,…

Hardware Architecture · Computer Science 2022-11-01 Chao Fang , Aojun Zhou , Zhongfeng Wang

Modern transformer architectures achieve remarkable performance across tasks and domains but remain rigid in how they allocate computation at inference time. Real-world deployment often requires models to adapt to diverse hardware and…

Computer Vision and Pattern Recognition · Computer Science 2025-11-25 Purvish Jajal , Nick John Eliopoulos , Benjamin Shiue-Hal Chou , George K. Thiruvathukal , Yung-Hsiang Lu , James C. Davis

Transformers have emerged as a powerful tool for natural language processing (NLP) and computer vision. Through the attention mechanism, these models have exhibited remarkable performance gains when compared to conventional approaches like…

Hardware Architecture · Computer Science 2024-07-18 Salma Afifi , Ishan Thakkar , Sudeep Pasricha

The separation of the data capture and analysis in modern vision systems has led to a massive amount of data transfer between the end devices and cloud computers, resulting in long latency, slow response, and high power consumption.…

Image and Video Processing · Electrical Eng. & Systems 2024-08-13 Ruibing Song , Kejie Huang , Zongsheng Wang , Haibin Shen

The Versal Adaptive Compute Acceleration Platform (ACAP) is a new architecture that combines AI Engines (AIEs) with reconfigurable fabric. This architecture offers significant acceleration potential for uniform recurrences in various…

Hardware Architecture · Computer Science 2024-01-31 Tuo Dai , Bizhao Shi , Guojie Luo

The paper discusses how Systolic Arrays can improve matrix multiplication for deep neural networks (DNNs). With AI models like OpenAI's GPT now containing trillions of parameters, the need for efficient matrix multiplication is more…

Hardware Architecture · Computer Science 2024-10-31 Tejas Raja

The ever-increasing quest for data-level parallelism and variable precision in ubiquitous multimedia and Deep Neural Network (DNN) applications has motivated the use of Single Instruction, Multiple Data (SIMD) architectures. To alleviate…

Hardware Architecture · Computer Science 2020-11-03 Zahra Ebrahimi , Salim Ullah , Akash Kumar

Matrix multiplications between asymmetric bit-width operands, especially between 8- and 4-bit operands are likely to become a fundamental kernel of many important workloads including neural networks and machine learning. While existing SIMD…

Machine Learning · Computer Science 2020-08-04 Dibakar Gope , Jesse Beu , Matthew Mattina
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