English
Related papers

Related papers: MaRVIn: A Cross-Layer Mixed-Precision RISC-V Frame…

200 papers

Recent advancements in quantization and mixed-precision approaches offers substantial opportunities to improve the speed and energy efficiency of Neural Networks (NN). Research has shown that individual parameters with varying low…

Hardware Architecture · Computer Science 2024-08-14 Giorgos Armeniakos , Alexis Maras , Sotirios Xydis , Dimitrios Soudris

The emerging trend of deploying complex algorithms, such as Deep Neural Networks (DNNs), increasingly poses strict memory and energy efficiency requirements on Internet-of-Things (IoT) end-nodes. Mixed-precision quantization has been…

Low bit-width Quantized Neural Networks (QNNs) enable deployment of complex machine learning models on constrained devices such as microcontrollers (MCUs) by reducing their memory footprint. Fine-grained asymmetric quantization (i.e.,…

Hardware Architecture · Computer Science 2020-10-09 Gianmarco Ottavi , Angelo Garofalo , Giuseppe Tagliavini , Francesco Conti , Luca Benini , Davide Rossi

This work introduces lightweight extensions to the RISC-V ISA to boost the efficiency of heavily Quantized Neural Network (QNN) inference on microcontroller-class cores. By extending the ISA with nibble (4-bit) and crumb (2-bit) SIMD…

Hardware Architecture · Computer Science 2020-12-01 Angelo Garofalo , Giuseppe Tagliavini , Francesco Conti , Luca Benini , Davide Rossi

Neural Networks (NNs) have been widely adopted due to their outstanding efficacy and adaptability across computer vision and deep learning applications. The optimization of NNs is necessary to enable their deployment on energy constrained…

Hardware Architecture · Computer Science 2026-05-12 Pragun Jaswal , L. Hemanth Krishna , B. Srinivasu

RISC-V processors encounter substantial challenges in deploying multi-precision deep neural networks (DNNs) due to their restricted precision support, constrained throughput, and suboptimal dataflow design. To tackle these challenges, a…

Hardware Architecture · Computer Science 2024-07-16 Chuanning Wang , Chao Fang , Xiao Wu , Zhongfeng Wang , Jun Lin

Deploying deep neural networks (DNNs) on those resource-constrained edge platforms is hindered by their substantial computation and storage demands. Quantized multi-precision DNNs, denoted as MP-DNNs, offer a promising solution for these…

Hardware Architecture · Computer Science 2024-10-10 Chuanning Wang , Chao Fang , Xiao Wu , Zhongfeng Wang , Jun Lin

Deploying deep neural networks (DNNs) on resource-constrained IoT devices remains a challenging problem, often requiring hardware modifications tailored to individual AI models. Existing accelerator-generation tools, such as AMD's FINN, do…

Edge AI deployment faces critical challenges balancing computational performance, energy efficiency, and resource constraints. This paper presents FPGA-accelerated RISC-V instruction set architecture (ISA) extensions for efficient neural…

Hardware Architecture · Computer Science 2025-11-11 Arya Parameshwara , Santosh Hanamappa Mokashi

A surge in artificial intelligence and autonomous technologies have increased the demand toward enhanced edge-processing capabilities. Computational complexity and size of state-of-the-art Deep Neural Networks (DNNs) are rising…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-05-12 Rawan Naous , Lazar Supic , Yoonhwan Kang , Ranko Sredojevic , Anish Singhani , Vladimir Stojanovic

The acceleration of pruned Deep Neural Networks (DNNs) on edge devices such as Microcontrollers (MCUs) is a challenging task, given the tight area- and power-constraints of these devices. In this work, we propose a three-fold contribution…

Machine Learning · Computer Science 2025-03-20 Francesco Daghero , Daniele Jahier Pagliari , Francesco Conti , Luca Benini , Massimo Poncino , Alessio Burrello

The proliferation of edge devices necessitates efficient computational architectures for lightweight tasks, particularly deep neural network (DNN) inference. Traditional NPUs, though effective for such operations, face challenges in power,…

Hardware Architecture · Computer Science 2024-07-04 Won Hyeok Kim , Hyeong Jin Kim , Tae Hee Han

The customizability of RISC-V makes it an attractive choice for accelerating deep neural networks (DNNs). It can be achieved through instruction set extensions and corresponding custom functional units. Yet, efficiently exploiting these…

Machine Learning · Computer Science 2025-04-29 Muhammad Sabih , Abrarul Karim , Jakob Wittmann , Frank Hannig , Jürgen Teich

The increasing demand for on-device intelligence in Edge AI and TinyML applications requires the efficient execution of modern Convolutional Neural Networks (CNNs). While lightweight architectures like MobileNetV2 employ Depthwise Separable…

Hardware Architecture · Computer Science 2025-11-27 Muhammed Yildirim , Ozcan Ozturk

The deployment of Quantized Neural Networks (QNN) on advanced microcontrollers requires optimized software to exploit digital signal processing (DSP) extensions of modern instruction set architectures (ISA). As such, recent research…

Hardware Architecture · Computer Science 2020-07-16 Nazareno Bruschi , Angelo Garofalo , Francesco Conti , Giuseppe Tagliavini , Davide Rossi

High-performance micro-kernels must fully exploit today's diverse and specialized hardware to deliver peak performance to DNNs. While higher-level optimizations for DNNs are offered by numerous compilers (e.g., MLIR, TVM, OpenXLA),…

Dense Matrix Multiplication (MatMul) is arguably one of the most ubiquitous compute-intensive kernels, spanning linear algebra, DSP, graphics, and machine learning applications. Thus, MatMul optimization is crucial not only in…

Hardware Architecture · Computer Science 2024-01-09 Matteo Perotti , Yichao Zhang , Matheus Cavalcante , Enis Mustafa , Luca Benini

Extreme edge platforms, such as in-vehicle smart devices, require efficient deployment of quantized deep neural networks (DNNs) to enable intelligent applications with limited amounts of energy, memory, and computing resources. However,…

Hardware Architecture · Computer Science 2024-03-28 Longwei Huang , Chao Fang , Qiong Li , Jun Lin , Zhongfeng Wang

Ternary neural networks (TNNs) offer a superior accuracy-energy trade-off compared to binary neural networks. However, until now, they have required specialized accelerators to realize their efficiency potential, which has hindered…

Hardware Architecture · Computer Science 2024-05-30 Georg Rutishauser , Joan Mihali , Moritz Scherer , Luca Benini

The emergence of heterogeneity and domain-specific architectures targeting deep learning inference show great potential for enabling the deployment of modern CNNs on resource-constrained embedded platforms. A significant development is the…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-25 Dmitri Lyalikov
‹ Prev 1 2 3 10 Next ›