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As the increasing complexity of Neural Network(NN) models leads to high demands for computation, AMD introduces a heterogeneous programmable system-on-chip (SoC), i.e., Versal ACAP architectures featured with programmable logic (PL), CPUs,…

Hardware Architecture · Computer Science 2023-05-31 Jinming Zhuang , Zhuoping Yang , Peipei Zhou

Sparse linear algebra is crucial in many application domains, but challenging to handle efficiently in both software and hardware, with one- and two-sided operand sparsity handled with distinct approaches. In this work, we enhance an…

Hardware Architecture · Computer Science 2023-10-03 Paul Scheffler , Florian Zaruba , Fabian Schuiki , Torsten Hoefler , Luca Benini

Reconfigurable architectures like Field Programmable Gate Arrays (FPGAs) have been used for accelerating computations in several domains because of their unique combination of flexibility, performance, and power efficiency. However, FPGAs…

Hardware Architecture · Computer Science 2023-04-26 Murat Isik , Kayode Inadagbo , Hakan Aktas

FPGA architectures have recently been enhanced to meet the substantial computational demands of modern deep neural networks (DNNs). To this end, both FPGA vendors and academic researchers have proposed in-fabric blocks that perform…

Hardware Architecture · Computer Science 2025-02-07 Endri Taka , Ning-Chi Huang , Chi-Chih Chang , Kai-Chiang Wu , Aman Arora , Diana Marculescu

Subgraph matching is a basic operation widely used in many applications. However, due to its NP-hardness and the explosive growth of graph data, it is challenging to compute subgraph matching, especially in large graphs. In this paper, we…

Databases · Computer Science 2021-02-25 Xin Jin , Zhengyi Yang , Xuemin Lin , Shiyu Yang , Lu Qin , You Peng

Sparse matrix multiplication operators (i.e., SpMM and SDDMM) are widely used in deep learning and scientific computing. Modern accelerators are commonly equipped with Tensor Core Units (TCUs) and CUDA cores to accelerate sparse operators.…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-23 Jinliang Shi , Shigang Li , Youxuan Xu , Xueying Wang , Rongtian Fu , Zhi Ma , Tong Wu

We develop and implement in this paper a fast sparse assembly algorithm, the fundamental operation which creates a compressed matrix from raw index data. Since it is often a quite demanding and sometimes critical operation, it is of…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-04-28 Stefan Engblom , Dimitar Lukarski

Field Programmable Gate Arrays generate algorithmic specific architectures that improve the code's FLOP per watt ratio. Such devices are re-gaining interest due to the rise of new tools that facilitate their programming, such as OmpSs. The…

Computational Physics · Physics 2021-07-28 Guillermo Oyarzun , Daniel Peyrolon , Carlos Alvarez , Xavier Martorell

High Performance Computing (HPC) platforms allow scientists to model computationally intensive algorithms. HPC clusters increasingly use General-Purpose Graphics Processing Units (GPGPUs) as accelerators; FPGAs provide an attractive…

Hardware Architecture · Computer Science 2015-04-20 Syed Waqar Nabi , Saji N. Hameed , Wim Vanderbauwhede

CPU-FPGA heterogeneous architectures are attracting ever-increasing attention in an attempt to advance computational capabilities and energy efficiency in today's datacenters. These architectures provide programmers with the ability to…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-09-24 Jason Cong , Peng Wei , Cody Hao Yu , Peng Zhang

Adopting FPGA as an accelerator in datacenters is becoming mainstream for customized computing, but the fact that FPGAs are hard to program creates a steep learning curve for software programmers. Even with the help of high-level synthesis…

Hardware Architecture · Computer Science 2021-09-01 Atefeh Sohrabizadeh , Cody Hao Yu , Min Gao , Jason Cong

Reservoir computing systems rely on the recurrent multiplication of a very large, sparse, fixed matrix. We argue that direct spatial implementation of these fixed matrices minimizes the work performed in the computation, and allows for…

Hardware Architecture · Computer Science 2021-01-25 Matthew Denton , Herman Schmit

Field-Programmable Gate Arrays (FPGAs) are widely used in the central signal processing design of the Square Kilometre Array (SKA) as acceleration hardware. The frequency domain acceleration search (FDAS) module is an important part of the…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-07-02 Haomiao Wang , Prabu Thiagaraj , Oliver Sinnen

The importance of general matrix multiplication (GEMM) is motivating new instruction set extensions for multiplying dense matrices in almost all contemporary ISAs, and these extensions are often implemented using high-performance systolic…

Hardware Architecture · Computer Science 2025-02-18 Tuan Ta , Joshua Randall , Christopher Batten

Sparse linear iterative solvers are essential for many large-scale simulations. Much of the runtime of these solvers is often spent in the implicit evaluation of matrix polynomials via a sequence of sparse matrix-vector products. A variety…

Numerical Analysis · Mathematics 2026-05-12 Christie Alappat , Jonas Thies , Georg Hager , Holger Fehske , Gerhard Wellein

Hash table is a fundamental data structure for quick search and retrieval of data. It is a key component in complex graph analytics and AI/ML applications. State-of-the-art parallel hash table implementations either make some simplifying…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-08-24 Ruizhi Zhang , Sasindu Wijeratne , Yang Yang , Sanmukh R. Kuppannagari , Viktor K. Prasanna

As the emerging field of machine learning, deep learning shows excellent ability in solving complex learning problems. However, the size of the networks becomes increasingly large scale due to the demands of the practical applications,…

Machine Learning · Computer Science 2016-05-24 Chao Wang , Qi Yu , Lei Gong , Xi Li , Yuan Xie , Xuehai Zhou

Emerging analog computing substrates, such as oscillator-based Ising machines, offer rapid convergence times for combinatorial optimization but often suffer from limited scalability due to physical implementation constraints. To tackle…

Emerging Technologies · Computer Science 2026-02-19 Ruihong Yin , Yue Zheng , Chaohui Li , Ahmet Efe , Abhimanyu Kumar , Ziqing Zeng , Ulya R. Karpuzcu , Sachin S. Sapatnekar , Chris H. Kim

Real-time Deep Neural Network (DNN) inference with low-latency requirement has become increasingly important for numerous applications in both cloud computing (e.g., Apple's Siri) and edge computing (e.g., Google/Waymo's driverless car).…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-02-11 Weiwen Jiang , Edwin H. -M. Sha , Xinyi Zhang , Lei Yang , Qingfeng Zhuge , Yiyu Shi , Jingtong Hu

Recurrent Neural Networks (RNNs) are vital for sequential data processing. Long Short-Term Memory Autoencoders (LSTM-AEs) are particularly effective for unsupervised anomaly detection in time-series data. However, inherent sequential…

Hardware Architecture · Computer Science 2026-03-17 Aimilios Leftheriotis , Dimosthenis Masouros , Dimitrios Soudris , George Theodoridis