English
Related papers

Related papers: Energy Efficient Exact and Approximate Systolic Ar…

200 papers

Convolutional neural network (CNN) inference on mobile devices demands efficient hardware acceleration of low-precision (INT8) general matrix multiplication (GEMM). The systolic array (SA) is a pipelined 2D array of processing elements…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-05-19 Zhi-Gang Liu , Paul N. Whatmough , Matthew Mattina

Deep convolutional neural networks (CNN) have shown their good performances in many computer vision tasks. However, the high computational complexity of CNN involves a huge amount of data movements between the computational processor core…

Hardware Architecture · Computer Science 2017-03-07 Shihao Wang , Dajiang Zhou , Xushen Han , Takeshi Yoshimura

The computation and memory-intensive nature of DNNs limits their use in many mobile and embedded contexts. Application-specific integrated circuit (ASIC) hardware accelerators employ matrix multiplication units (such as the systolic arrays)…

Hardware Architecture · Computer Science 2024-02-02 Ruiqi Sun , Yinchen Ni , Xin He , Jie Zhao , An Zou

Systolic arrays are a prominent choice for deep neural network (DNN) accelerators because they offer parallelism and efficient data reuse. Improving the reliability of DNN accelerators is crucial as hardware faults can degrade the accuracy…

Hardware Architecture · Computer Science 2024-02-13 Wei-Kai Liu

The paper discusses how Systolic Arrays can improve matrix multiplication for deep neural networks (DNNs). With AI models like OpenAI's GPT now containing trillions of parameters, the need for efficient matrix multiplication is more…

Hardware Architecture · Computer Science 2024-10-31 Tejas Raja

Transformers are gaining increasing attention across Natural Language Processing (NLP) application domains due to their outstanding accuracy. However, these data-intensive models add significant performance demands to the existing computing…

Hardware Architecture · Computer Science 2025-08-07 Ahmed J. Abdelmaksoud , Shady Agwa , Themis Prodromakis

Transformers are at the core of modern AI nowadays. They rely heavily on matrix multiplication and require efficient acceleration due to their substantial memory and computational requirements. Quantization plays a vital role in reducing…

Hardware Architecture · Computer Science 2026-04-03 Ahmed J. Abdelmaksoud , Cristian Sestito , Shiwei Wang , Themis Prodromakis

The widespread proliferation of deep learning applications has triggered the need to accelerate them directly in hardware. General Matrix Multiplication (GEMM) kernels are elemental deep-learning constructs and they inherently map onto…

Hardware Architecture · Computer Science 2023-09-14 C. Peltekis , D. Filippas , G. Dimitrakopoulos , C. Nicopoulos

The number of processing elements (PEs) in a fixed-sized systolic accelerator is well matched for large and compute-bound DNNs; whereas, memory-bound DNNs suffer from PE underutilization and fail to achieve peak performance and energy…

Signal Processing · Electrical Eng. & Systems 2020-06-29 Nandan Kumar Jha , Shreyas Ravishankar , Sparsh Mittal , Arvind Kaushik , Dipan Mandal , Mahesh Chandra

As the size of Deep Neural Networks (DNNs) increases dramatically to achieve high accuracy, the DNNs require a large amount of computations and memory footprint. Pruning, which produces a sparse neural network, is one of the solutions to…

Hardware Architecture · Computer Science 2026-04-30 Hyunsung Yoon , Sungju Ryu , Jae-Joon Kim

The emergence of Deep Neural Networks (DNNs) in mission- and safety-critical applications brings their reliability to the front. High performance demands of DNNs require the use of specialized hardware accelerators. Systolic array…

Hardware Architecture · Computer Science 2025-11-05 Natalia Cherezova , Artur Jutman , Maksim Jenihhin

This paper proposes an low power approximate multiplier architecture for deep neural network (DNN) applications. A 4:2 compressor, introducing only a single combination error, is designed and integrated into an 8x8 unsigned multiplier. This…

Hardware Architecture · Computer Science 2025-09-03 Pragun Jaswal , L. Hemanth Krishna , B. Srinivasu

Deep neural network (DNN) has emerged as the most important and popular artificial intelligent (AI) technique. The growth of model size poses a key energy efficiency challenge for the underlying computing platform. Thus, model compression…

Computer Vision and Pattern Recognition · Computer Science 2020-04-24 Chunhua Deng , Siyu Liao , Yi Xie , Keshab K. Parhi , Xuehai Qian , Bo Yuan

Convolutional Neural Networks (CNNs) are the state-of-the-art solution for many deep learning applications. For maximum scalability, their computation should combine high performance and energy efficiency. In practice, the convolutions of…

Hardware Architecture · Computer Science 2023-06-07 C. Peltekis , D. Filippas , G. Dimitrakopoulos , C. Nicopoulos , D. Pnevmatikatos

In this article, we investigate the impact of architectural parameters of array-based DNN accelerators on accelerator's energy consumption and performance in a wide variety of network topologies. For this purpose, we have developed a tool…

Hardware Architecture · Computer Science 2022-06-28 Mohammad Ali Maleki , Mehdi Kamal , Ali Afzali-Kusha

The acceleration of deep-learning kernels in hardware relies on matrix multiplications that are executed efficiently on Systolic Arrays (SA). To effectively trade off deep-learning training/inference quality with hardware cost, SA…

Hardware Architecture · Computer Science 2023-09-11 D. Filippas , C. Peltekis , G. Dimitrakopoulos , C. Nicopoulos

Edge computing must be capable of executing computationally intensive algorithms, such as Deep Neural Networks (DNNs) while operating within a constrained computational resource budget. Such computations involve Matrix Vector…

Hardware Architecture · Computer Science 2023-10-24 Arani Roy , Kaushik Roy

The training for deep neural networks (DNNs) demands immense energy consumption, which restricts the development of deep learning as well as increases carbon emissions. Thus, the study of energy-efficient training for DNNs is essential. In…

Machine Learning · Computer Science 2023-03-01 Chang Liu , Rui Zhang , Xishan Zhang , Yifan Hao , Zidong Du , Xing Hu , Ling Li , Qi Guo

Recurrent Neural Networks (RNNs) are becoming increasingly important for time series-related applications which require efficient and real-time implementations. The recent pruning based work ESE suffers from degradation of…

Machine Learning · Computer Science 2018-03-26 Zhe Li , Shuo Wang , Caiwen Ding , Qinru Qiu , Yanzhi Wang , Yun Liang

Modern deep learning models have high memory and computation cost. To make them fast and memory-cost efficient, structured model pruning is commonly used. We find that pruning a model using a common training accelerator with large systolic…

Machine Learning · Computer Science 2020-04-29 Sangkug Lym , Mattan Erez
‹ Prev 1 2 3 10 Next ›