Related papers: Through Silicon Via Aware Design Planning for Ther…

3D stacked technology has emerged as an effective mechanism to overcome physical limits and communication delays found in 2D integration. However, 3D technology also presents several drawbacks that prevent its smooth application. Two of the…

As superconducting qubit circuits become more complex, addressing a large array of qubits becomes a challenging engineering problem. Dense arrays of qubits benefit from, and may require, access via the third dimension to alleviate…

The semiconductor industry's rapid advancement pushes conventional two-dimensional technology to its utmost limitations in terms of scaling, performance, and cost factors. These challenges drive the usage of 3D technology in the production…

Side-channel attacks are important security challenges as they reveal sensitive information about on-chip activities. Among such attacks, the thermal side-channel has been shown to disclose the activities of key functional blocks and even…

Increasing circuit complexity within quantum systems based on superconducting qubits necessitates high connectivity while retaining qubit coherence. Classical micro-electronic systems have addressed interconnect density challenges by using…

The Through Silicon Via (TSV) process developed by Silex provides down to 30 micrometers pitch for through wafer connections in up to 600 micrometers thick substrates. Integrated with MEMS designs it enables significantly reduced die size…

Heterogeneous manycore architectures are the key to efficiently execute compute- and data-intensive applications. Through silicon via (TSV)-based 3D manycore system is a promising solution in this direction as it enables integration of…

Two dimensional (2D) integration has been the traditional approach for IC integration. Due to increasing demands for providing electronic devices with superior performance and functionality in more efficient and compact packages, has driven…

In three dimensional integrated circuits (3D-ICs), through silicon via (TSV) is a critical technique in providing vertical connections. However, the yield and reliability is one of the key obstacles to adopt the TSV based 3D-ICs technology…

For beyond 2-D CMOS logic, various 3-D integration approaches specially transistor based 3-D integrations such as monolithic 3-D [1], Skybridge [2], SN3D [3] holds most promise. However, such 3D architectures within small form factor…

Thermal management of integrated circuits (ICs) is important to prevent thermal hotspots which are the leading cause of IC failure. Thermal management is even more critical in 3D integrated circuits (3D ICs) as the prevalence of thermal…

Various side-channel attacks (SCAs) on ICs have been successfully demonstrated and also mitigated to some degree. In the context of 3D ICs, however, prior art has mainly focused on efficient implementations of classical SCA countermeasures.…

Besides the lot of advantages offered by the 3D stacking of devices in an integrated circuit there is a chance of device damage due to rise in peak temperature value. Hence, in order to make use of all the potential benefits of the vertical…

In this study, we report the first Cu-filled through silicon via (TSV) integrated ion trap. TSVs are placed directly underneath electrodes as vertical interconnections between ion trap and a glass interposer, facilitating the arbitrary…

Application Specific Integrated Circuits (ASICs) are commonly used to efficiently process the signals from sensors and detectors in space. Wire bonding is a space qualified technique of making interconnections between ASICs and their…

By combining Three Dimensional Integrated Circuits with the Network-on-Chip infrastructure to obtain 3D Networks-on-Chip (3D-NoCs), the new on-chip communication paradigm brings several advantages on lower power, smaller footprint and lower…

3D-Integration is a promising technology towards higher interconnect densities and shorter wiring lengths between multiple chip stacks, thus achieving a very high performance level combined with low power consumption. This technology also…

3D integration technologies are seeing widespread adoption in the semiconductor industry to offset the limitations and slowdown of two-dimensional scaling. High-density 3D integration techniques such as face-to-face wafer bonding with…

In a multiprocessor system on chip (MPSoC) IC the processor is one of the highest heat dissipating devices. The temperature generated in an IC may vary with floor plan of the chip. This paper proposes an integration and thermal analysis…

Most previous 3D IC research focused on stacking traditional 2D silicon layers, so the interconnect reduction is limited to inter-block delays. In this paper, we propose techniques that enable efficient exploration of the 3D design space…