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The rise of data-intensive applications exposed the limitations of conventional processor-centric von-Neumann architectures that struggle to meet the off-chip memory bandwidth demand. Therefore, recent innovations in computer architecture…

Hardware Architecture · Computer Science 2024-05-28 Asif Ali Khan , Hamid Farzaneh , Karl F. A. Friebel , Clément Fournier , Lorenzo Chelini , Jeronimo Castrillon

Real-world applications are now processing big-data sets, often bottlenecked by the data movement between the compute units and the main memory. Near-memory computing (NMC), a modern data-centric computational paradigm, can alleviate these…

Hardware Architecture · Computer Science 2021-06-30 Stefano Corda , Madhurya Kumaraswamy , Ahsan Javed Awan , Roel Jordans , Akash Kumar , Henk Corporaal

In today's data-centric world, where data fuels numerous application domains, with machine learning at the forefront, handling the enormous volume of data efficiently in terms of time and energy presents a formidable challenge. Conventional…

Hardware Architecture · Computer Science 2024-01-29 Asif Ali Khan , João Paulo C. De Lima , Hamid Farzaneh , Jeronimo Castrillon

With the recent growth in demand for large-scale deep neural networks, compute in-memory (CiM) has come up as a prominent solution to alleviate bandwidth and on-chip interconnect bottlenecks that constrain Von-Neuman architectures. However,…

Hardware Architecture · Computer Science 2024-03-19 Souvik Kundu , Anthony Sarah , Vinay Joshi , Om J Omer , Sreenivas Subramoney

While deep neural network (DNN)-based video denoising has demonstrated significant performance, deploying state-of-the-art models on edge devices remains challenging due to stringent real-time and energy efficiency requirements.…

Computer Vision and Pattern Recognition · Computer Science 2025-05-29 Shan Gao , Zhiqiang Wu , Yawen Niu , Xiaotao Li , Qingqing Xu

Machine learning and data analytics applications increasingly suffer from the high latency and energy consumption of conventional von Neumann architectures. Recently, several in-memory and near-memory systems have been proposed to remove…

Hardware Architecture · Computer Science 2023-09-13 Hamid Farzaneh , João Paulo Cardoso de Lima , Mengyuan Li , Asif Ali Khan , Xiaobo Sharon Hu , Jeronimo Castrillon

The increasing prevalence and growing size of data in modern applications have led to high costs for computation in traditional processor-centric computing systems. Moving large volumes of data between memory devices (e.g., DRAM) and…

Hardware Architecture · Computer Science 2022-06-01 Geraldo F. Oliveira , Juan Gómez-Luna , Saugata Ghose , Onur Mutlu

The widespread adoption of data-centric algorithms, particularly Artificial Intelligence (AI) and Machine Learning (ML), has exposed the limitations of centralized processing infrastructures, driving a shift towards edge computing. This…

Calculating the most efficient schedule of work in a neural network compiler is a difficult task. There are many parameters to be accounted for that can positively or adversely affect that schedule depending on their configuration - How…

Processing-in-Memory (PIM) has emerged as a promising computing paradigm to address the memory wall and the fundamental bottleneck of the von Neumann architecture by reducing costly data movement between memory and processing units. As with…

Hardware Architecture · Computer Science 2025-12-02 Mahdi Aghaei , Saba Ebrahimi , Mohammad Saleh Arafati , Elham Cheshmikhani , Dara Rahmati , Saeid Gorgin , Jungrae Kim

Despite the outstanding performance of convolutional neural networks (CNNs) for many vision tasks, the required computational cost during inference is problematic when resources are limited. In this context, we propose Convolutional Neural…

Computer Vision and Pattern Recognition · Computer Science 2019-08-20 Adria Ruiz , Jakob Verbeek

Compute-in-Memory (CIM) architectures have been widely studied for deep neural network (DNN) acceleration by reducing data transfer overhead between the memory and computing units. In conventional CIM design flows, system-level CIM…

Hardware Architecture · Computer Science 2026-03-11 Ming-Yen Lee , Shimeng Yu

Data movement between memory and processors is a major bottleneck in modern computing systems. The processing-in-memory (PIM) paradigm aims to alleviate this bottleneck by performing computation inside memory chips. Real PIM hardware (e.g.,…

Hardware Architecture · Computer Science 2023-10-04 Jinfan Chen , Juan Gómez-Luna , Izzat El Hajj , Yuxin Guo , Onur Mutlu

Compute in-memory (CIM) is a promising technique that minimizes data transport, the primary performance bottleneck and energy cost of most data intensive applications. This has found wide-spread adoption in accelerating neural networks for…

Hardware Architecture · Computer Science 2020-08-18 Brian Crafton , Samuel Spetalnick , Gauthaman Murali , Tushar Krishna , Sung-Kyu Lim , Arijit Raychowdhury

Designing lightweight convolutional neural network (CNN) models is an active research area in edge AI. Compute-in-memory (CIM) provides a new computing paradigm to alleviate time and energy consumption caused by data transfer in von Neumann…

Hardware Architecture · Computer Science 2025-08-19 Wenyong Zhou , Yuan Ren , Jiajun Zhou , Tianshu Hou , Ngai Wong

Convolutional neural networks (CNNs) play a key role in deep learning applications. However, the large storage overheads and the substantial computation cost of CNNs are problematic in hardware accelerators. Computing-in-memory (CIM)…

Hardware Architecture · Computer Science 2021-05-26 Syuan-Hao Sie , Jye-Luen Lee , Yi-Ren Chen , Chih-Cheng Lu , Chih-Cheng Hsieh , Meng-Fan Chang , Kea-Tiong Tang

To maximize hardware efficiency and performance accuracy in Compute-In-Memory (CIM)-based neural network accelerators for Artificial Intelligence (AI) applications, co-optimizing both software and hardware design parameters is essential.…

Artificial Intelligence · Computer Science 2025-10-01 Olga Krestinskaya , Mohammed E. Fouda , Ahmed Eltawil , Khaled N. Salama

Compute-in-memory (CIM) architecture has been widely explored to address the von Neumann bottleneck in accelerating deep neural networks (DNNs). However, its reliability remains largely understudied, particularly in the emerging domain of…

Hardware Architecture · Computer Science 2025-07-22 Qiufeng Li , Yiwen Liang , Weidong Cao

Computational memory (CM) is a promising approach for accelerating inference on neural networks (NN) by using enhanced memories that, in addition to storing data, allow computations on them. One of the main challenges of this approach is…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-04-27 Kornilios Kourtis , Martino Dazzi , Nikolas Ioannou , Tobias Grosser , Abu Sebastian , Evangelos Eleftheriou

The resurgence of near-memory processing (NMP) with the advent of big data has shifted the computation paradigm from processor-centric to memory-centric computing. To meet the bandwidth and capacity demands of memory-centric computing, 3D…

Hardware Architecture · Computer Science 2021-04-29 Pritam Majumder , Jiayi Huang , Sungkeun Kim , Abdullah Muzahid , Dylan Siegers , Chia-Che Tsai , Eun Jung Kim
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