English
Related papers

Related papers: Inter-APU Communication on AMD MI300A Systems via …

200 papers

As dataset sizes increase, data analysis tasks in high performance computing (HPC) are increasingly dependent on sophisticated dataflows and out-of-core methods for efficient system utilization. In addition, as HPC systems grow, memory…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-10-01 George K. Thiruvathukal , Cameron Christensen , Xiaoyong Jin , François Tessier , Venkatram Vishwanath

Improving the performance and reducing the cost of cloud data systems is increasingly challenging. Data processing units (DPUs) are a promising solution, but utilizing them for data processing needs characterizing the new hardware and…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-07-30 Jiasheng Hu , Philip A. Bernstein , Jialin Li , Qizhen Zhang

GPUs are the heart of the latest generations of supercomputers. We efficiently accelerate a compressible multiphase flow solver via OpenACC on NVIDIA and AMD Instinct GPUs. Optimization is accomplished by specifying the directive clauses…

Networks of interconnected resistors, springs and beams, or pores are standard models of studying scalar and vector transport processes in heterogeneous materials and media, such as fluid flow in porous media, and conduction, deformations,…

Computational Physics · Physics 2019-08-12 Hassan Dashtian , Muhammad Sahimi

High-performance computing (HPC) and supercomputing are critical in Artificial Intelligence (AI) research, development, and deployment. The extensive use of supercomputers for training complex AI models, which can take from days to months,…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-09-27 Luis G. León-Vega , Niccolò Tosato , Stefano Cozzini

The Aurora supercomputer, which was deployed at Argonne National Laboratory in 2024, is currently one of three Exascale machines in the world on the Top500 list. The Aurora system is composed of over ten thousand nodes each of which…

Analog in-memory computing (AIMC) cores offers significant performance and energy benefits for neural network inference with respect to digital logic (e.g., CPUs). AIMCs accelerate matrix-vector multiplications, which dominate these…

Wireless baseband processing (WBP) is a key element of wireless communications, with a series of signal processing modules to improve data throughput and counter channel fading. Conventional hardware solutions, such as digital signal…

Hardware Architecture · Computer Science 2025-06-23 Limin Jiang , Yi Shi , Yintao Liu , Qingyu Deng , Siyi Xu , Yihao Shen , Fangfang Ye , Shan Cao , Zhiyuan Jiang

One of the barriers to the adoption of parallel computing is the inherent complexity of its programming. The Open Multi-Processing (OpenMP) Application Programming Interface (API) facilitates such implementations, providing high abstraction…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-07-21 Reinaldo Agostinho de Souza Filho , Diego V. Cirilo do Nascimento , Samuel Xavier-de-Souza

Traditional von Neumann GPGPUs only allow threads to communicate through memory on a group-to-group basis. In this model, a group of producer threads writes intermediate values to memory, which are read by a group of consumer threads after…

Hardware Architecture · Computer Science 2018-01-17 Dani Voitsechov , Yoav Etsion

The Coherent Accelerator Processor Interface (CAPI) is a general term for the infrastructure that provides high throughput and low latency path to the flash storage connected to the IBM POWER 8+ System. CAPI accelerator card is attached…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-09-17 Kaushik Velusamy , Smriti Prathapan , Milton Halem

To cope with the increasing demand and computational intensity of deep neural networks (DNNs), industry and academia have turned to accelerator technologies. In particular, FPGAs have been shown to provide a good balance between performance…

Hardware Architecture · Computer Science 2018-07-12 Yongming Shen , Tianchu Ji , Michael Ferdman , Peter Milder

As research and deployment of AI grows, the computational burden to support and sustain its progress inevitably does too. To train or fine-tune state-of-the-art models in NLP, computer vision, etc., some form of AI hardware acceleration is…

Hardware Architecture · Computer Science 2024-03-01 Dan Zhao , Siddharth Samsi , Joseph McDonald , Baolin Li , David Bestor , Michael Jones , Devesh Tiwari , Vijay Gadepally

High performance large scale graph analytics are essential to timely analyze relationships in big data sets. Conventional processor architectures suffer from inefficient resource usage and bad scaling on those workloads. To enable efficient…

Graphics Processing Units (GPUs) have become a de facto solution for accelerating high-performance computing (HPC) applications. Understanding their memory error behavior is an essential step toward achieving efficient and reliable HPC…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-09-05 Zhu Zhu , Yu Sun , Dhatri Parakal , Bo Fang , Steven Farrell , Gregory H. Bauer , Brett Bode , Ian T. Foster , Michael E. Papka , William Gropp , Zhao Zhang , Lishan Yang

We present a comparative analysis of the maximum performance achieved by the Linpack benchmark on compute intensive hardware publicly available from multiple cloud providers. We study both performance within a single compute node, and…

Performance · Computer Science 2018-07-17 Mohammad Mohammadi , Timur Bazhirov

Connected components and spanning forest are fundamental graph algorithms due to their use in many important applications, such as graph clustering and image segmentation. GPUs are an ideal platform for graph algorithms due to their high…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-08-28 Changwan Hong , Laxman Dhulipala , Julian Shun

High Performance Computing (HPC) on hybrid clusters represents a significant opportunity for Computational Fluid Dynamics (CFD), especially when modern accelerators are utilized effectively. However, despite the widespread adoption of GPUs,…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-30 Simone Bnà , Giuseppe Giaquinto , Ettore Fadiga , Tommaso Zanelli , Francesco Bottau

Processing-using-DRAM (PUD) is a processing-in-memory (PIM) approach that uses a DRAM array's massive internal parallelism to execute very-wide data-parallel operations, in a single-instruction multiple-data (SIMD) fashion. However, DRAM…

Artificial Intelligence (AI) workloads drive a rapid expansion of high-performance computing (HPC) infrastructures and increase their power and energy demands towards a critical level. AI benchmarks representing state-of-the art workloads…

Performance · Computer Science 2026-03-18 Martin Mayr , Sebastian Wind , Lukas Schröder , Georg Hager , Harald Köstler , Gerhard Wellein
‹ Prev 1 4 5 6 7 8 10 Next ›