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Related papers: ARMS: Adaptive and Robust Memory Tiering System

200 papers

Sorting is fundamental and ubiquitous in modern computing systems. Hardware sorting systems are built based on comparison operations with Von Neumann architecture, but their performance are limited by the bandwidth between memory and…

Hardware Architecture · Computer Science 2023-09-20 Lianfeng Yu , Yaoyu Tao , Teng Zhang , Zeyu Wang , Xile Wang , Zelun Pan , Bowen Wang , Zhaokun Jing , Jiaxin Liu , Yuqi Li , Yihang Zhu , Bonan Yan , Yuchao Yang

This paper summarizes the idea of Adaptive-Latency DRAM (AL-DRAM), which was published in HPCA 2015, and examines the work's significance and future potential. AL-DRAM is a mechanism that optimizes DRAM latency based on the DRAM module and…

Hardware Architecture · Computer Science 2018-05-09 Donghyuk Lee , Yoongu Kim , Gennady Pekhimenko , Samira Khan , Vivek Seshadri , Kevin Chang , Onur Mutlu

The increasing demand for memory in hyperscale applications has led to memory becoming a large portion of the overall datacenter spend. The emergence of coherent interfaces like CXL enables main memory expansion and offers an efficient…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-05-30 Hasan Al Maruf , Hao Wang , Abhishek Dhanotia , Johannes Weiner , Niket Agarwal , Pallab Bhattacharya , Chris Petersen , Mosharaf Chowdhury , Shobhit Kanaujia , Prakash Chauhan

Obtaining optimal data transfer performance is of utmost importance to today's data-intensive distributed applications and wide-area data replication services. Doing so necessitates effectively utilizing available network bandwidth and…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-08-21 Engin Arslan , Tevfik Kosar

Although every individual invented storage technology made a big step towards perfection, none of them is spotless. Different data store essentials such as performance, availability, and recovery requirements have not met together in a…

Hardware Architecture · Computer Science 2019-04-29 Morteza Hoseinzadeh

We present MaxMem, a tiered main memory management system that aims to maximize Big Data application colocation and performance. MaxMem uses an application-agnostic and lightweight memory occupancy control mechanism based on fast memory…

Operating Systems · Computer Science 2023-12-04 Amanda Raybuck , Wei Zhang , Kayvan Mansoorshahi , Aditya K. Kamath , Mattan Erez , Simon Peter

Flexibility at hardware level is the main driving force behind adaptive systems whose aim is to realise microarhitecture deconfiguration 'online'. This feature allows the software/hardware stack to tolerate drastic changes of the workload…

Hardware Architecture · Computer Science 2016-12-28 Ana Lava , Mahdi Jelodari Mamaghani , Siamak Mohammadi , Steve Furber

In the year of 2017, the capital expenditure of Flash-based Solid State Drivers (SSDs) keeps declining and the storage capacity of SSDs keeps increasing. As a result, the "selling point" of traditional spinning Hard Disk Drives (HDDs) as a…

Hardware and OS mechanisms for memory tiering are widely deployed, yet datacenters still overprovision DRAM. The root cause is hotness fragmentation: allocators place objects by size rather than access pattern, so hot and cold objects…

Operating Systems · Computer Science 2026-03-03 Vinay Banakar , Suli Yang , Kan Wu , Andrea C. Arpaci-Dusseau , Remzi H. Arpaci-Dusseau , Kimberly Keeton

This paper addresses the challenge of human-guided navigation for mobile collaborative robots under simultaneous proximity regulation and safety constraints. We introduce Adaptive Reinforcement and Model Predictive Control Switching (ARMS),…

Robotics · Computer Science 2026-01-26 Ning Liu , Sen Shen , Zheng Li , Matthew D'Souza , Jen Jen Chung , Thomas Braunl

Performance tuning of Database Management Systems(DBMS) is both complex and challenging as it involves identifying and altering several key performance tuning parameters. The quality of tuning and the extent of performance enhancement…

Databases · Computer Science 2010-05-07 S. F. Rodd , U. P. Kulkarni

This paper summarizes the idea of Adaptive-Latency DRAM (AL-DRAM), which was published in HPCA 2015. The key goal of AL-DRAM is to exploit the extra margin that is built into the DRAM timing parameters to reduce DRAM latency. The key…

Hardware Architecture · Computer Science 2016-03-29 Donghyuk Lee , Yoongu Kim , Gennady Pekhimenko , Samira Khan , Vivek Seshadri , Kevin Chang , Onur Mutlu

Typically, a memory request from a processor may need to go through many intermediate interconnect routers, directory node, owner node, etc before it is finally serviced. Current multiprocessors do not give preference to any particular…

Hardware Architecture · Computer Science 2016-06-21 Sandeep Navada , Anil Krishna

The evolution of parallel I/O library as well as new concepts such as 'in transit' and 'in situ' visualization and analysis have been identified as key technologies to circumvent I/O bottleneck in pre-exascale applications. Nevertheless,…

Instrumentation and Methods for Astrophysics · Physics 2022-09-13 Loïc Strafella , Damien Chapon

Serverless Large Language Models (LLMs) have emerged as a cost-effective solution for deploying AI services by enabling a 'pay-as-you-go' pricing model through GPU resource sharing. However, cold-start latency, especially the model loading…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-02 Wenbin Zhu , Zhaoyan Shen , Zili Shao , Hongjun Dai , Feng Chen

This paper investigates hardware-based memory compression designs to increase the memory bandwidth. When lines are compressible, the hardware can store multiple lines in a single memory location, and retrieve all these lines in a single…

Hardware Architecture · Computer Science 2018-07-23 Vinson Young , Sanjay Kariyappa , Moinuddin K. Qureshi

We investigate the achievable rate (AR) of a stacked intelligent metasurface (SIM)-aided holographic multiple-input multiple-output (HMIMO) system by jointly optimizing the SIM phase shifts and power allocation. Contrary to earlier studies…

Signal Processing · Electrical Eng. & Systems 2025-08-14 Eduard E. Bahingayi , Nemanja Stefan Perović , Le-Nam Tran

Data-hungry applications that require terabytes of memory have become widespread in recent years. To meet the memory needs of these applications, data centers are embracing tiered memory architectures with near and far memory tiers.…

Operating Systems · Computer Science 2023-12-01 Alan Nair , Sandeep Kumar , Aravinda Prasad , Andy Rudoff , Sreenivas Subramoney

Simulating physical systems is essential in engineering, but analytical solutions are limited to straightforward problems. Consequently, numerical methods like the Finite Element Method (FEM) are widely used. However, the FEM becomes…

Machine Learning · Computer Science 2026-01-30 Niklas Freymuth , Philipp Dahlinger , Tobias Würth , Simon Reisch , Luise Kärger , Gerhard Neumann

High-resolution simulations often rely on the Adaptive Mesh Resolution (AMR) technique to optimize memory consumption versus attainable precision. While this technique allows for dramatic improvements in terms of computing performance, the…

Data Structures and Algorithms · Computer Science 2013-01-03 Marc Labadens , Daniel Pomarède , Damien Chapon , Romain Teyssier , Frédéric Bournaud , Florent Renaud , Nicolas Grandjouan