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Related papers: Compute SNR-Optimal Analog-to-Digital Converters f…

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This paper obtains fundamental limits on the computational precision of in-memory computing architectures (IMCs). An IMC noise model and associated SNR metrics are defined and their interrelationships analyzed to show that the accuracy of…

Hardware Architecture · Computer Science 2020-12-29 Sujan Kumar Gonugondla , Charbel Sakr , Hassan Dbouk , Naresh R. Shanbhag

Analog In-memory Computing (AIMC) has emerged as a highly efficient paradigm for accelerating Deep Neural Networks (DNNs), offering significant energy and latency benefits over conventional digital hardware. However, state-of-the-art neural…

Machine Learning · Computer Science 2025-06-24 Aniss Bessalah , Hatem Mohamed Abdelmoumen , Karima Benatchba , Hadjer Benmeziane

In recent years, Compute-in-memory (CiM) architectures have emerged as a promising solution for deep neural network (NN) accelerators. Multiply-accumulate~(MAC) is considered a {\textit de facto} unit operation in NNs. By leveraging the…

Signal Processing · Electrical Eng. & Systems 2026-01-05 Dhandeep Challagundla , Ignatius Bezzam , Riadul Islam

SRAM-based Analog Compute-in-Memory (ACiM) demonstrates promising energy efficiency for deep neural network (DNN) processing. Nevertheless, efforts to optimize efficiency frequently compromise accuracy, and this trade-off remains…

Hardware Architecture · Computer Science 2025-09-03 Wenlun Zhang , Shimpei Ando , Yung-Chin Chen , Kentaro Yoshioka

Spiking Neural Networks (SNNs) are bio-plausible models that hold great potential for realizing energy-efficient implementations of sequential tasks on resource-constrained edge devices. However, commercial edge platforms based on standard…

Neural and Evolutionary Computing · Computer Science 2023-09-26 Marco Paul E. Apolinario , Adarsh Kumar Kosta , Utkarsh Saxena , Kaushik Roy

Recent works propose neural network- (NN-) inspired analog-to-digital converters (NNADCs) and demonstrate their great potentials in many emerging applications. These NNADCs often rely on resistive random-access memory (RRAM) devices to…

Machine Learning · Computer Science 2019-12-02 Weidong Cao , Liu Ke , Ayan Chakrabarti , Xuan Zhang

Charge-domain compute-in-memory (CIM) SRAMs have recently become an enticing compromise between computing efficiency and accuracy to process sub-8b convolutional neural networks (CNNs) at the edge. Yet, they commonly make use of a fixed…

Hardware Architecture · Computer Science 2024-12-30 Adrian Kneip , Martin Lefebvre , Pol Maistriaux , David Bol

Analog In-Memory Compute (AIMC) can improve the energy efficiency of Deep Learning by orders of magnitude. Yet analog-domain device and circuit non-idealities -- within the analog ``Tiles'' performing Matrix-Vector Multiply (MVM) operations…

Hardware Architecture · Computer Science 2025-06-03 J. Luquin , C. Mackin , S. Ambrogio , A. Chen , F. Baldi , G. Miralles , M. J. Rasch , J. Büchel , M. Lalwani , W. Ponghiran , P. Solomon , H. Tsai , G. W. Burr , P. Narayanan

The energy efficiency of analog computing-in-memory (ACIM) accelerator for recurrent neural networks, particularly long short-term memory (LSTM) network, is limited by the high proportion of nonlinear (NL) operations typically executed…

Hardware Architecture · Computer Science 2025-12-09 Junyi Yang , Xinyu Luo , Ye Ke , Zheng Wang , Hongyang Shang , Shuai Dong , Zhengnan Fu , Xiaofeng Yang , Hongjie Liu , Arindam Basu

Analog In-Memory Computing (AIMC) is an emerging technology for fast and energy-efficient Deep Learning (DL) inference. However, a certain amount of digital post-processing is required to deal with circuit mismatches and non-idealities…

Hardware Architecture · Computer Science 2024-07-10 Elena Ferro , Athanasios Vasilopoulos , Corey Lammie , Manuel Le Gallo , Luca Benini , Irem Boybat , Abu Sebastian

The paper deals with the task of optimal design of Analog to Digital Converters (ADCs). A general ADC is modeled as a causal discrete-time dynamical system with outputs taking values in a finite set, and its performance is defined as the…

Optimization and Control · Mathematics 2015-03-17 Mitra Osqui , Alexandre Megretski , Mardavij Roozbehani

We propose a co-design approach for compute-in-memory inference for deep neural networks (DNN). We use multiplication-free function approximators based on ell_1 norm along with a co-adapted processing array and compute flow. Using the…

Hardware Architecture · Computer Science 2021-02-02 Shamma Nasrin , Diaa Badawi , Ahmet Enis Cetin , Wilfred Gomes , Amit Ranjan Trivedi

In-Memory Computing (IMC) has emerged as a promising paradigm for energy-efficient, throughput-efficient and area-efficient machine learning at the edge. However, the differences in hardware architectures, array dimensions, and fabrication…

Signal Processing · Electrical Eng. & Systems 2024-05-27 Jiacong Sun , Pouya Houshmand , Marian Verhelst

The demand for computation resources and energy efficiency of Convolutional Neural Networks (CNN) applications requires a new paradigm to overcome the "Memory Wall". Analog In-Memory Computing (AIMC) is a promising paradigm since it…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-11-24 Nazareno Bruschi , Giuseppe Tagliavini , Angelo Garofalo , Francesco Conti , Irem Boybat , Luca Benini , Davide Rossi

With the advent of high-speed, high-precision, and low-power mixed-signal systems, there is an ever-growing demand for accurate, fast, and energy-efficient analog-to-digital (ADCs) and digital-to-analog converters (DACs). Unfortunately,…

Systems and Control · Electrical Eng. & Systems 2024-06-05 Loai Danial , Kanishka Sharma , Shahar Kvatinsky

With the advent of the 5G wireless networks, achieving tens of gigabits per second throughputs and low, milliseconds, latency has become a reality. This level of performance will fuel numerous real-time applications, such as autonomy and…

Signal Processing · Electrical Eng. & Systems 2020-09-14 Ashkan Samiee , Yiming Zhou , Tingyi Zhou , Bahram Jalali

In-memory-computing is emerging as an efficient hardware paradigm for deep neural network accelerators at the edge, enabling to break the memory wall and exploit massive computational parallelism. Two design models have surged: analog…

Hardware Architecture · Computer Science 2023-05-31 Pouya Houshmand , Jiacong Sun , Marian Verhelst

In this paper, we develop an in-memory analog computing (IMAC) architecture realizing both synaptic behavior and activation functions within non-volatile memory arrays. Spin-orbit torque magnetoresistive random-access memory (SOT-MRAM)…

Hardware Architecture · Computer Science 2021-09-15 Mohammed Elbtity , Abhishek Singh , Brendan Reidy , Xiaochen Guo , Ramtin Zand

Developing accurate and reliable Compute-In-Memory (CIM) architectures is becoming a key research focus to accelerate Artificial Intelligence (AI) tasks on hardware, particularly Deep Neural Networks (DNNs). In that regard, there has been…

Hardware Architecture · Computer Science 2026-04-15 Omar Numan , Gaurav Singh , Kazybek Adam , Jelin Leslin , Aleksi Korsman , Otto Simola , Marko Kosunen , Jussi Ryynänen , Martin Andraud

In-memory computing (IMC) is an effectual solution for energy-efficient artificial intelligence applications. Analog IMC amortizes the power consumption of multiple sensing amplifiers with analog-to-digital converter (ADC), and…

Emerging Technologies · Computer Science 2021-10-11 Hao Cai , Yanan Guo , Bo Liu , Mingyang Zhou , Juntong Chen , Xinning Liu , Jun Yang
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