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Running Large Language Models (LLMs) on edge devices is constrained by high compute and memory demands posing a barrier for real-time applications in sectors like healthcare, education, and embedded systems. Current solutions such as…

The challenge of creating domain-centric embeddings arises from the abundance of unstructured data and the scarcity of domain-specific structured data. Conventional embedding techniques often rely on either modality, limiting their…

Machine Learning · Computer Science 2024-10-29 Sharadind Peddiraju , Srini Rajagopal

Large Language Model (LLM) inference is hard. The autoregressive Decode phase of the underlying Transformer model makes LLM inference fundamentally different from training. Exacerbated by recent AI trends, the primary challenges are memory…

Hardware Architecture · Computer Science 2026-02-10 Xiaoyu Ma , David Patterson

High Efficiency Video Coding (HEVC) significantly reduces bit-rates over the proceeding H.264 standard but at the expense of extremely high encoding complexity. In HEVC, the quad-tree partition of coding unit (CU) consumes a large…

Computer Vision and Pattern Recognition · Computer Science 2019-03-06 Mai Xu , Tianyi Li , Zulin Wang , Xin Deng , Ren Yang , Zhenyu Guan

This paper investigates hardware-based memory compression designs to increase the memory bandwidth. When lines are compressible, the hardware can store multiple lines in a single memory location, and retrieve all these lines in a single…

Hardware Architecture · Computer Science 2018-07-23 Vinson Young , Sanjay Kariyappa , Moinuddin K. Qureshi

Several Hybrid Transactional Memory (HyTM) schemes have recently been proposed to complement the fast, but best-effort, nature of Hardware Transactional Memory (HTM) with a slow, reliable software backup. However, the fundamental…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-02-18 Dan Alistarh , Justin Kopinsky , Petr Kuznetsov , Srivatsan Ravi , Nir Shavit

In recent times, the emergence of Large Language Models (LLMs) has resulted in increasingly larger model size, posing challenges for inference on low-resource devices. Prior approaches have explored offloading to facilitate low-memory…

Performance · Computer Science 2024-03-05 Xuanlei Zhao , Bin Jia , Haotian Zhou , Ziming Liu , Shenggan Cheng , Yang You

In the wake of the success of convolutional neural networks in image classification, object recognition, speech recognition, etc., the demand for deploying these compute-intensive ML models on embedded and mobile systems with tight power…

Computer Vision and Pattern Recognition · Computer Science 2019-11-12 Lukas Cavigelli , Georg Rutishauser , Luca Benini

Although image super-resolution (SR) problem has experienced unprecedented restoration accuracy with deep neural networks, it has yet limited versatile applications due to the substantial computational costs. Since different input images…

Computer Vision and Pattern Recognition · Computer Science 2024-04-05 Cheeun Hong , Kyoung Mu Lee

Computing-in-memory (CIM) promises to alleviate the Von Neumann bottleneck and accelerate data-intensive applications. Depending on the underlying technology and configuration, CIM enables implementing compute primitives in place, such as…

Hardware Architecture · Computer Science 2024-08-01 Preston Brazzle , Benjamin F. Morris , Evan McKinney , Peipei Zhou , Jingtong Hu , Asif Ali Khan , Alex K. Jones

Large language model (LLM)-based coding agents increasingly rely on external memory to reuse prior debugging experience, repair traces, and repository-local operational knowledge. However, retrieved memory is useful only when the current…

Computation and Language · Computer Science 2026-05-01 Mehmet Iscan

Large language model (LLM) inference performance is increasingly bottlenecked by the memory wall. While GPUs continue to scale raw compute throughput, they struggle to deliver scalable performance for memory bandwidth bound workloads. This…

Hardware Architecture · Computer Science 2026-02-25 Matthew Adiletta , Gu-Yeon Wei , David Brooks

Smart manufacturing requires on-device intelligence that meets strict latency and energy budgets. HyperDimensional Computing (HDC) offers a lightweight alternative by encoding data as high-dimensional hypervectors and computing with simple…

Machine Learning · Computer Science 2025-10-01 Fardin Jalil Piran , Anandkumar Patel , Rajiv Malhotra , Farhad Imani

Edge computing is a promising solution for handling high-dimensional, multispectral analog data from sensors and IoT devices for applications such as autonomous drones. However, edge devices' limited storage and computing resources make it…

Machine Learning · Computer Science 2023-09-21 Nastaran Darabi , Amit R. Trivedi

The rapid progress in Deep Learning (DL) and Large Language Models (LLMs) has exponentially increased demands of computational power and bandwidth. This, combined with the high costs of faster computing chips and interconnects, has…

Processing-in-Memory (PIM) architectures offer promising solutions for efficiently handling AI applications in energy-constrained edge environments. While traditional PIM designs enhance performance and energy efficiency by reducing data…

Hardware Architecture · Computer Science 2025-12-09 Sangmin Jeon , Kangju Lee , Kyeongwon Lee , Woojoo Lee

Privacy-preserving computation techniques like homomorphic encryption (HE) and secure multi-party computation (SMPC) enhance data security by enabling processing on encrypted data. However, the significant computational and CPU-DRAM data…

Cryptography and Security · Computer Science 2024-09-26 Mpoki Mwaisela

Hyperdimensional computing (HDC) is an emerging computing paradigm that represents, manipulates, and communicates data using very long random vectors (aka hypervectors). Among different hardware platforms capable of executing HDC…

Hardware Architecture · Computer Science 2022-05-24 Robert Guirado , Abbas Rahimi , Geethan Karunaratne , Eduard Alarcón , Abu Sebastian , Sergi Abadal

By supporting the access of multiple memory words at the same time, Bit-line Computing (BC) architectures allow the parallel execution of bit-wise operations in-memory. At the array periphery, arithmetic operations are then derived with…

Hardware Architecture · Computer Science 2022-09-14 Marco Rios , Flavio Ponzina , Alexandre Levisse , Giovanni Ansaloni , David Atienza

Long-context Large Language Model (LLM) inference faces increasing compute bottlenecks as attention calculations scale with context length, primarily due to the growing KV-cache transfer overhead that saturates High Bandwidth Memory (HBM).…

Hardware Architecture · Computer Science 2025-08-13 Ming-Yen Lee , Faaiq Waqar , Hanchen Yang , Muhammed Ahosan Ul Karim , Harsono Simka , Shimeng Yu
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