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The rapid advancements in artificial intelligence (AI), particularly the Large Language Models (LLMs), have profoundly affected our daily work and communication forms. However, it is still a challenge to deploy LLMs on resource-constrained…

Hardware Architecture · Computer Science 2025-03-03 Mingqiang Huang , Ao Shen , Kai Li , Haoxiang Peng , Boyu Li , Yupeng Su , Hao Yu

Latency and energy consumption are key metrics in the performance of deep neural network (DNN) accelerators. A significant factor contributing to latency and energy is data transfers. One method to reduce transfers or data is reusing data…

Hardware Architecture · Computer Science 2024-10-15 Michael Gilbert , Yannan Nellie Wu , Joel S. Emer , Vivienne Sze

The rapid growth of Internet-of-things (IoT) and artificial intelligence applications have called forth a new computing paradigm--edge computing. In this paper, we study the suitability of deploying FPGAs for edge computing from the…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-04-19 Saman Biookaghazadeh , Fengbo Ren , Ming Zhao

Recent deep learning workloads increasingly push computational demand beyond what current memory systems can sustain, with many kernels stalling on data movement rather than computation. While modern dataflow accelerators incorporate…

Programming Languages · Computer Science 2025-09-09 Shihan Fang , Hongzheng Chen , Niansong Zhang , Jiajie Li , Han Meng , Adrian Liu , Zhiru Zhang

Today, artificial neural networks are one of the major innovators pushing the progress of machine learning. This has particularly affected the development of neural network accelerating hardware. However, since most of these architectures…

Hardware Architecture · Computer Science 2021-02-12 Simon Pfenning , Philipp Holzinger , Marc Reichenbach

Deep learning (DL) has emerged as a rapidly developing advanced technology, enabling the performance of complex tasks involving image recognition, natural language processing, and autonomous decision-making with high levels of accuracy.…

Hardware Architecture · Computer Science 2026-03-11 Soumita Chatterjee , Sudip Ghosh , Tamal Ghosh , Hafizur Rahaman

We present the first end-to-end deployment of the Gemma3 family of large language and vision models on a tiled edge dataflow architecture (AMD Ryzen AI NPU). Our work introduces a set of hardware-aware techniques. For prefill, we introduce…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-02-25 Shouyu Du , Miaoxiang Yu , Zhenyu Xu , Zhiheng Ni , Jillian Cai , Qing Yang , Tao Wei

Embedded Field-Programmable Gate Arrays (eFPGAs) allow for the design of hardware accelerators of edge Machine Learning (ML) applications at a lower power budget compared with traditional FPGA platforms. However, the limited eFPGA logic and…

Hardware Architecture · Computer Science 2025-02-13 Tousif Rahman , Gang Mao , Bob Pattison , Sidharth Maheshwari , Marcos Sartori , Adrian Wheeldon , Rishad Shafik , Alex Yakovlev

Dynamic GNN inference has exhibited effectiveness in High Energy Physics (HEP) experiments at High Luminosity Large Hadron Collider (HL-LHC) due to strong capability to model complex particle interactions in collision events. Future HEP…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-03-24 Davendra Maharaj , Tu Pham , Peter Meiring , Kyungmin Park , Sena Durgut , Cong Hao , Matteo Cremonesi

Efficient execution of deep learning workloads on dataflow architectures is crucial for overcoming memory bottlenecks and maximizing performance. While streaming intermediate results between computation kernels can significantly improve…

Hardware Architecture · Computer Science 2025-09-24 Hanchen Ye , Deming Chen

The increased demand for data privacy and security in machine learning (ML) applications has put impetus on effective edge training on Internet-of-Things (IoT) nodes. Edge training aims to leverage speed, energy efficiency and adaptability…

Hardware Architecture · Computer Science 2025-04-29 Gang Mao , Tousif Rahman , Sidharth Maheshwari , Bob Pattison , Zhuang Shao , Rishad Shafik , Alex Yakovlev

There has been a recent surge in the field of Explainable AI (XAI) which tackles the problem of providing insights into the behavior of black-box machine learning models. Within this field, \textit{feature attribution} encompasses methods…

Hardware Architecture · Computer Science 2022-10-21 Ashwin Bhat , Adou Sangbone Assoa , Arijit Raychowdhury

FPGAs are well-suited for dataflow architectures that process data in a streaming or pipelined manner, thus satisfying the high computational and communication demands of emerging applications. However, manually implementing an efficient…

Hardware Architecture · Computer Science 2026-04-15 Weichuang Zhang , Yiquan Wang , Xinzhou Zhang , Chi Zhang , Yu Feng , Xiaofeng Hou , Chao Li , Jieru Zhao , Minyi Guo

Edge Artificial Intelligence (Edge AI) embeds intelligence directly into devices at the network edge, enabling real-time processing with improved privacy and reduced latency by processing data close to its source. This review systematically…

Machine Learning · Computer Science 2025-10-03 Mohamad Abou Ali , Fadi Dornaika

Spatial dataflow accelerators are a promising direction for next-generation computer systems because they can reduce the memory bottlenecks of traditional von Neumann machines such as CPUs and GPUs. They organize computation around…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-13 Wei Li , Zhenyu Bai , Heru Wang , Pranav Dangi , Zhiqiang Zhang , Cheng Tan , Huiying Lan , Weng-Fai Wong , Tulika Mitra

Deep learning (DL) is becoming the cornerstone of numerous applications both in datacenters and at the edge. Specialized hardware is often necessary to meet the performance requirements of state-of-the-art DL models, but the rapid pace of…

Hardware Architecture · Computer Science 2025-12-16 Andrew Boutros , Aman Arora , Vaughn Betz

Among hardware accelerators for deep-learning inference, data flow implementations offer low latency and high throughput capabilities. In these architectures, each neuron is mapped to a dedicated hardware unit, making them well-suited for…

Machine Learning · Computer Science 2026-03-10 Tobias Habermann , Michael Mecik , Zhenyu Wang , César David Vera , Martin Kumm , Mario Garrido

Extreme-edge scientific applications use machine learning models to analyze sensor data and make real-time decisions. Their stringent latency and throughput requirements demand small batch sizes and require that model weights remain fully…

Hardware Architecture · Computer Science 2026-04-22 Zhenghua Ma , G Abarajithan , Dimitrios Danopoulos , Olivia Weng , Francesco Restuccia , Ryan Kastner

Multi-Head Attention (MHA) is a critical computational kernel in transformer-based AI models. Emerging scalable tile-based accelerator architectures integrate increasing numbers of tightly-packed processing elements (PEs) with tensor units.…

Hardware Architecture · Computer Science 2025-05-27 Chi Zhang , Luca Colagrande , Renzo Andri , Thomas Benz , Gamze Islamoglu , Alessandro Nadalini , Francesco Conti , Yawei Li , Luca Benini

The rapid growth of end-user AI applications, such as computer vision and generative AI, has led to immense data and processing demands often exceeding user devices' capabilities. Edge AI addresses this by offloading computation to the…

Machine Learning · Computer Science 2024-11-05 Juan Marcelo Parra-Ullauri , Oscar Dilley , Hari Madhukumar , Dimitra Simeonidou
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