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Deploying large language models (LLMs) on edge platforms is challenged by their high computational and memory demands. Although recent low-bit quantization methods (e.g., BitNet, DeepSeek) compress weights to as little as 1.58 bits with…

Hardware Architecture · Computer Science 2025-04-28 Ye Qiao , Zhiheng Chen , Yifan Zhang , Yian Wang , Sitao Huang

Large-language models (LLMs) are rapidly being applied to radiology, enabling automated image interpretation and report generation tasks. Their deployment in clinical practice requires both high diagnostic accuracy and low inference…

Tissues and Organs · Quantitative Biology 2025-11-11 Jyun-Ping Kao

The NVIDIA Volta GPU microarchitecture introduces a specialized unit, called "Tensor Core" that performs one matrix-multiply-and-accumulate on 4x4 matrices per clock cycle. The NVIDIA Tesla V100 accelerator, featuring the Volta…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-12-18 Stefano Markidis , Steven Wei Der Chien , Erwin Laure , Ivy Bo Peng , Jeffrey S. Vetter

Driven by deep learning, there has been a surge of specialized processors for matrix multiplication, referred to as TensorCore Units (TCUs). These TCUs are capable of performing matrix multiplications on small matrices (usually 4x4 or…

Performance · Computer Science 2019-11-26 Abdul Dakkak , Cheng Li , Isaac Gelado , Jinjun Xiong , Wen-mei Hwu

Gaussian processes are widely used in machine learning domains but remain computationally demanding, limiting their efficient scalability across emerging hardware platforms. The GPRat library addresses these challenges using the HPX…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-29 Alexander Strack , Patrick Diehl , Dirk Pflüger

Edge AI deployment faces critical challenges balancing computational performance, energy efficiency, and resource constraints. This paper presents FPGA-accelerated RISC-V instruction set architecture (ISA) extensions for efficient neural…

Hardware Architecture · Computer Science 2025-11-11 Arya Parameshwara , Santosh Hanamappa Mokashi

Tensor networks are a class of algorithms aimed at reducing the computational complexity of high-dimensional problems. They are used in an increasing number of applications, from quantum simulations to machine learning. Exploiting data…

Numerical Analysis · Mathematics 2024-10-25 Melven Röhrig-Zöllner , Manuel Joey Becklas , Jonas Thies , Achim Basermann

Computation-intensive tensor operators constitute over 90\% of the computations in Large Language Models (LLMs) and Deep Neural Networks.Automatically and efficiently generating high-performance tensor operators with hardware primitives is…

Large-scale deep learning benefits from an emerging class of AI accelerators. Some of these accelerators' designs are general enough for compute-intensive applications beyond AI and Cloud TPU is one such example. In this paper, we…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-11-19 Kun Yang , Yi-Fan Chen , Georgios Roumpos , Chris Colby , John Anderson

Improving GPU kernel efficiency is crucial for advancing AI systems. Recent work has explored leveraging large language models (LLMs) for GPU kernel generation and optimization. However, existing LLM-based kernel optimization pipelines…

Machine Learning · Computer Science 2026-03-12 Qitong Sun , Jun Han , Tianlin Li , Zhe Tang , Sheng Chen , Fei Yang , Aishan Liu , Xianglong Liu , Yang Liu

The increase in open-source availability of Large Language Models (LLMs) has enabled users to deploy them on more and more resource-constrained edge devices to reduce reliance on network connections and provide more privacy. However, the…

Hardware Architecture · Computer Science 2024-08-02 Jude Haris , Rappy Saha , Wenhao Hu , José Cano

The recent exponential growth of Large Language Models (LLMs) has relied on GPU-based systems. However, CPUs are emerging as a flexible and lower-cost alternative, especially when targeting inference and reasoning workloads. RISC-V is…

Machine Learning · Computer Science 2025-03-25 Javier J. Poveda Rodrigo , Mohamed Amine Ahmdi , Alessio Burrello , Daniele Jahier Pagliari , Luca Benini

Graphics processing units (GPUs) excel at parallel processing, but remain largely unexplored in ultra-low-power edge devices (TinyAI) due to their power and area limitations, as well as the lack of suitable programming frameworks. To…

Hardware Architecture · Computer Science 2026-03-17 Simone Machetti , Pasquale Davide Schiavone , Lara Orlandic , Darong Huang , Deniz Kasap , Giovanni Ansaloni , David Atienza

The push for greater efficiency in AI computation has given rise to an array of accelerator architectures that increasingly challenge the GPU's long-standing dominance. In this work, we provide a quantitative view of this evolving landscape…

Hardware Architecture · Computer Science 2026-04-14 Alicia Golden , Carole-Jean Wu , Gu-Yeon Wei , David Brooks

The exponentially growing model size drives the continued success of deep learning, but it brings prohibitive computation and memory cost. From the algorithm perspective, model sparsification and quantization have been studied to alleviate…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-05-09 Shigang Li , Kazuki Osawa , Torsten Hoefler

Reconfigurable architectures like Field Programmable Gate Arrays (FPGAs) have been used for accelerating computations in several domains because of their unique combination of flexibility, performance, and power efficiency. However, FPGAs…

Hardware Architecture · Computer Science 2023-04-26 Murat Isik , Kayode Inadagbo , Hakan Aktas

Many architects believe that major improvements in cost-energy-performance must now come from domain-specific hardware. This paper evaluates a custom ASIC---called a Tensor Processing Unit (TPU)---deployed in datacenters since 2015 that…

Neural Networks (NN) have been proven to be powerful tools to analyze Big Data. However, traditional CPUs cannot achieve the desired performance and/or energy efficiency for NN applications. Therefore, numerous NN accelerators have been…

Hardware Architecture · Computer Science 2021-03-24 Taoran Xiang , Lunkai Zhang , Shuqian An , Xiaochun Ye , Mingzhe Zhang , Yanhuan Liu , Mingyu Yan , Da Wang , Hao Zhang , Wenming Li , Ninghui Sun , Dongrui Fan

Dense Matrix Multiplication (MatMul) is arguably one of the most ubiquitous compute-intensive kernels, spanning linear algebra, DSP, graphics, and machine learning applications. Thus, MatMul optimization is crucial not only in…

Hardware Architecture · Computer Science 2024-01-09 Matteo Perotti , Yichao Zhang , Matheus Cavalcante , Enis Mustafa , Luca Benini

Computing on graphics processors is maybe one of the most important developments in computational science to happen in decades. Not since the arrival of the Beowulf cluster, which combined open source software with commodity hardware to…

Mathematical Software · Computer Science 2011-09-21 Felipe A. Cruz , Simon K. Layton , Lorena A. Barba