Related papers: S-SYNC: Shuttle and Swap Co-Optimization in Quantu…
Trapped-ion (TI) quantum bits are a front-runner technology for quantum computing. TI systems with multiple interconnected traps can overcome the hardware connectivity issue inherent in superconducting qubits and can solve practical…
Trapped-ion (TI) quantum computer is one of the forerunner quantum technologies. However, TI systems can have a limited number of qubits in a single trap. Execution of meaningful quantum algorithms requires a multiple trap system. In such…
The scaling up of trapped-ion quantum processors based on the quantum charge-coupled device (QCCD) architecture is difficult owing to the extensive electronics and high-density wiring required to control numerous trap electrodes. In…
We present the quantum-selected configuration interaction-tailored coupled-cluster (QSCI-TCC) method, a hybrid quantum-classical scheme that tailors coupled-cluster (CC) theory with a quantum-selected configuration interaction (QSCI) wave…
Qubit shuttling has become an indispensable ingredient for scaling leading quantum computing platforms, including semiconductor spin, neutral-atom, and trapped-ion qubits, enabling both crosstalk reduction and tighter integration of control…
Simultaneous quantum-classical communications (SQCC) protocols are a family of continuous-variable quantum key distribution (CV-QKD) protocols which allow for quantum and classical symbols to be integrated concurrently on the same optical…
We propose Qubit4Sync, a synchronization method for Quantum Key Distribution (QKD) setups, based on the same qubits exchanged during the protocol and without requiring additional hardware other than the one necessary to prepare and measure…
The increasing capabilities of quantum computing hardware and the challenge of realizing deep quantum circuits require fully automated and efficient tools for compiling quantum circuits. To express arbitrary circuits in a sequence of native…
Trapped-ion systems can have a limited number of ions (qubits) in a single trap. Increasing the qubit count to run meaningful quantum algorithms would require multiple traps where ions need to shuttle between traps to communicate. The…
Trapped ions (TI) are a leading candidate for building Noisy Intermediate-Scale Quantum (NISQ) hardware. TI qubits have fundamental advantages over other technologies such as superconducting qubits, including high qubit quality, coherence…
Hybrid quantum-high performance computing (Q-HPC) workflows are emerging as a key strategy for running quantum applications at scale in current noisy intermediate-scale quantum (NISQ) devices. These workflows must operate seamlessly across…
Qubit shuttling promises to advance some quantum computing platforms to the qubit register sizes needed for effective quantum error correction (QEC), but also introduces additional errors whose impact must be evaluated. The established…
Shuttling of single electrons in gate-defined silicon quantum dots is numerically simulated. A minimal gate geometry without explicit tunnel barrier gates is introduced, and used to define a chain of accumulation mode quantum dots, each…
Scalable coherent control hardware for quantum information platforms is rapidly growing in priority as their number of available qubits continues to increase. As these systems scale, more calibration steps are needed, leading to challenges…
Switched-Capacitor Converters (SCC) suffer from a fundamental power loss deficiency which make their use in some applications prohibitive. The power loss is due to the inherent energy dissipation when SCC operate between or outside their…
The most essential concept in concurrent multiscale methods involving atomistic-continuum coupling is how to define the relation between atomistic and continuum regions. A well-known coupling method that has been frequently employed in…
In this work, we explore and propose several quantum circuit mapping strategies to optimize qubit shuttling in scalable quantum computing architectures based on silicon spin qubits. Our goal is to minimize phase errors introduced during…
We propose a distributed quantum computing (DQC) architecture in which individual small-sized quantum computers are connected to a shared quantum gate processing unit (S-QGPU). The S-QGPU comprises a collection of hybrid two-qubit gate…
Using the Parity Flow formalism, we show that physical SWAP gates can be eliminated in linear hardware architectures, without increasing the total number of two-qubit operations. This has a significant impact on the execution time of…
Trapped ions are a promising technology for building scalable quantum computers. Not only can they provide a high qubit quality, but they also enable modular architectures, referred to as Quantum Charge Coupled Device (QCCD) architecture.…